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Commit 817bff34 authored by Jilai Wang's avatar Jilai Wang
Browse files

ARM: dts: msm: Add tcsr register region for npu 

This change is to add tcsr register region in order to access
npu cpc power information.

Change-Id: I6c2453614c846637265772326eeb1696366e74bd
parent 0845cd2c

qcom/kona-npu.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -4,10 +4,10 @@ 
		status = "ok";

		reg = <0x9900000 0x20000>,

			<0x99F0000 0x10000>,

			<0x9800000 0x100000>,

			<0x9980000 0x10000>,

			<0x17c00000 0x10000>;

		reg-names = "tcm", "core", "qdsp", "cc", "apss_shared";

			<0x17c00000 0x10000>,

			<0x01F40000 0x40000>;

		reg-names = "tcm", "core", "cc", "apss_shared", "tcsr";

		interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,

				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,

qcom/lito-npu.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -4,10 +4,10 @@ 
		status = "ok";

		reg = <0x9900000 0x20000>,

			<0x99F0000 0x10000>,

			<0x9800000 0x100000>,

			<0x9980000 0x10000>,

			<0x17c00000 0x10000>;

		reg-names = "tcm", "core", "qdsp", "cc", "apss_shared";

			<0x17c00000 0x10000>,

			<0x01F40000 0x40000>;

		reg-names = "tcm", "core", "cc", "apss_shared", "tcsr";

		interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,

				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,