Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8127bfc5 authored by FUJITA Tomonori's avatar FUJITA Tomonori Committed by Linus Torvalds
Browse files

DMA-API.txt: remove dma_sync_single_range description



dma_sync_single_for_cpu/for_device supports a partial sync so there is no
point to have dma_sync_single_range (also dma_sync_single was obsoleted
long ago, replaced with dma_sync_single_for_cpu/for_device).

There is no user of dma_sync_single_range() in mainline and only Alpha
architecture supports dma_sync_single_range().  So it's unlikely that
someone out of the tree uses it.

Signed-off-by: default avatarFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: default avatarDavid Miller <davem@davemloft.net>
Acked-by: default avatarJames Bottomley <James.Bottomley@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 9705ef7e
Loading
Loading
Loading
Loading
+0 −10
Original line number Diff line number Diff line
@@ -527,16 +527,6 @@ line, but it will guarantee that one or more cache lines fit exactly
into the width returned by this call.  It will also always be a power
of two for easy alignment.

void
dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
		      unsigned long offset, size_t size,
		      enum dma_data_direction direction)

Does a partial sync, starting at offset and continuing for size.  You
must be careful to observe the cache alignment and width when doing
anything like this.  You must also be extra careful about accessing
memory you intend to sync partially.

void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	       enum dma_data_direction direction)