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Commit 810b6d76 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next 



Jeff Kirsher says:

====================
This series contains updates to ixgbe, ixgbevf, igbvf, igb and
networking core (bridge).  Most notably is the addition of support
for local link multicast addresses in SR-IOV mode to the networking
core.

Also note, the ixgbe patch "ixgbe: Add support for pipeline reset" and
"ixgbe: Fix return value from macvlan filter function" is revised based
on community feedback.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f7b4fb22 ac61d515

drivers/net/ethernet/intel/igb/e1000_defines.h

+14 −0
Original line number Diff line number Diff line
@@ -636,6 +636,7 @@ 
/* NVM Word Offsets */

#define NVM_COMPAT                 0x0003

#define NVM_ID_LED_SETTINGS        0x0004 /* SERDES output amplitude */

#define NVM_VERSION                0x0005

#define NVM_INIT_CONTROL2_REG      0x000F

#define NVM_INIT_CONTROL3_PORT_B   0x0014

#define NVM_INIT_CONTROL3_PORT_A   0x0024
@@ -653,6 +654,19 @@ 
#define NVM_LED_1_CFG              0x001C

#define NVM_LED_0_2_CFG            0x001F



/* NVM version defines */

#define NVM_ETRACK_WORD            0x0042

#define NVM_COMB_VER_OFF           0x0083

#define NVM_COMB_VER_PTR           0x003d

#define NVM_MAJOR_MASK             0xF000

#define NVM_MINOR_MASK             0x0FF0

#define NVM_BUILD_MASK             0x000F

#define NVM_COMB_VER_MASK          0x00FF

#define NVM_MAJOR_SHIFT                12

#define NVM_MINOR_SHIFT                 4

#define NVM_COMB_VER_SHFT               8

#define NVM_VER_INVALID            0xFFFF

#define NVM_ETRACK_SHIFT               16



#define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */

#define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */

drivers/net/ethernet/intel/igb/e1000_mac.c

+4 −0
Original line number Diff line number Diff line
@@ -1391,6 +1391,10 @@ s32 igb_validate_mdi_setting(struct e1000_hw *hw) 
{

	s32 ret_val = 0;



	/* All MDI settings are supported on 82580 and newer. */

	if (hw->mac.type >= e1000_82580)

		goto out;



	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {

		hw_dbg("Invalid MDI setting detected\n");

		hw->phy.mdix = 1;

drivers/net/ethernet/intel/igb/e1000_nvm.c

+70 −0
Original line number Diff line number Diff line
@@ -710,3 +710,73 @@ s32 igb_update_nvm_checksum(struct e1000_hw *hw) 
out:

	return ret_val;

}



/**

 *  igb_get_fw_version - Get firmware version information

 *  @hw: pointer to the HW structure

 *  @fw_vers: pointer to output structure

 *

 *  unsupported MAC types will return all 0 version structure

 **/

void igb_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)

{

	u16 eeprom_verh, eeprom_verl, comb_verh, comb_verl, comb_offset;

	u16 fw_version;



	memset(fw_vers, 0, sizeof(struct e1000_fw_version));



	switch (hw->mac.type) {

	case e1000_i211:

		return;

	case e1000_82575:

	case e1000_82576:

	case e1000_82580:

	case e1000_i350:

	case e1000_i210:

		break;

	default:

		return;

	}

	/* basic eeprom version numbers */

	hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);

	fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK) >> NVM_MAJOR_SHIFT;

	fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK);



	/* etrack id */

	hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);

	hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);

	fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) | eeprom_verl;



	switch (hw->mac.type) {

	case e1000_i210:

	case e1000_i350:

		/* find combo image version */

		hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);

		if ((comb_offset != 0x0) && (comb_offset != NVM_VER_INVALID)) {



			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset

					 + 1), 1, &comb_verh);

			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),

					 1, &comb_verl);



			/* get Option Rom version if it exists and is valid */

			if ((comb_verh && comb_verl) &&

			    ((comb_verh != NVM_VER_INVALID) &&

			     (comb_verl != NVM_VER_INVALID))) {



				fw_vers->or_valid = true;

				fw_vers->or_major =

					comb_verl >> NVM_COMB_VER_SHFT;

				fw_vers->or_build =

					((comb_verl << NVM_COMB_VER_SHFT)

					| (comb_verh >> NVM_COMB_VER_SHFT));

				fw_vers->or_patch =

					comb_verh & NVM_COMB_VER_MASK;

			}

		}

		break;

	default:

		break;

	}

	return;

}

drivers/net/ethernet/intel/igb/e1000_nvm.h

+16 −0
Original line number Diff line number Diff line
@@ -40,4 +40,20 @@ s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 
s32  igb_validate_nvm_checksum(struct e1000_hw *hw);

s32  igb_update_nvm_checksum(struct e1000_hw *hw);



struct e1000_fw_version {

	u32 etrack_id;

	u16 eep_major;

	u16 eep_minor;



	u8 invm_major;

	u8 invm_minor;

	u8 invm_img_type;



	bool or_valid;

	u16 or_major;

	u16 or_build;

	u16 or_patch;

};

void igb_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers);



#endif

drivers/net/ethernet/intel/igb/e1000_phy.c

+17 −12
Original line number Diff line number Diff line
@@ -1207,20 +1207,25 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw) 
	u16 phy_data;

	bool link;



	/* I210 and I211 devices support Auto-Crossover in forced operation. */

	if (phy->type != e1000_phy_i210) {

		/*

	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI

	 * forced whenever speed and duplex are forced.

		 * Clear Auto-Crossover to force MDI manually.  M88E1000

		 * requires MDI forced whenever speed and duplex are forced.

		 */

	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

		ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,

					    &phy_data);

		if (ret_val)

			goto out;



		phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;

	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);

		ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,

					     phy_data);

		if (ret_val)

			goto out;



		hw_dbg("M88E1000 PSCR: %X\n", phy_data);

	}



	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);

	if (ret_val)