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Commit 80c615d0 authored by Tony Truong's avatar Tony Truong
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dt-bindings: pcie: add entry for PCIe core preset

Add devicetree entry to configure PCIe core preset value.

Change-Id: Ic5f410f9c6cc40cd05ebb254deb9980298b76b24
parent 0845cd2c
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+8 −0
Original line number Diff line number Diff line
@@ -333,6 +333,13 @@ Main node
	Definition: The latency(ms) between when PCIe link is up and before
		any device over the switch is accessed

- qcom,core-preset:
	Usage: optional
	Definition: Determines how aggressive the PCIe PHY equalization is for
		Gen3 cores. The following are recommended settings:
		- short channels: 0x55555555 (default)
		- long channels: 0x77777777

- qcom,pcie-phy-ver:
	Usage: required
	Value type: <u32>
@@ -508,6 +515,7 @@ Example
		qcom,ep-latency = <20>;
		qcom,switch-latency = <25>;

		qcom,core-preset = <0x55555555> /* short channel */
		qcom,pcie-phy-ver = <0x2101>; /* v2 version 1.01 */
		qcom,phy-status-offset = <0x814>;
		qcom,phy-status-bit = <6>;