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Commit 80861d94 authored by Ping Li's avatar Ping Li
Browse files

drm/msm/sde: add device tree parsing and property installation for LTM 



Add support to parse the device tree entries and install required
properties for LTM feature.

Change-Id: I103575a8298488ce21934db2095f4cbc62c6857b
Signed-off-by: default avatarPing Li <pingli@codeaurora.org>
parent 4aac5596

drivers/gpu/drm/msm/sde/sde_color_processing.c

+69 −0
Original line number Diff line number Diff line
@@ -49,6 +49,8 @@ static void dspp_sixzone_install_property(struct drm_crtc *crtc); 


static void dspp_ad_install_property(struct drm_crtc *crtc);



static void dspp_ltm_install_property(struct drm_crtc *crtc);



static void dspp_vlut_install_property(struct drm_crtc *crtc);



static void dspp_gamut_install_property(struct drm_crtc *crtc);
@@ -85,6 +87,7 @@ do { \ 
	func[SDE_DSPP_MEMCOLOR] = dspp_memcolor_install_property; \

	func[SDE_DSPP_SIXZONE] = dspp_sixzone_install_property; \

	func[SDE_DSPP_AD] = dspp_ad_install_property; \

	func[SDE_DSPP_LTM] = dspp_ltm_install_property; \

	func[SDE_DSPP_VLUT] = dspp_vlut_install_property; \

	func[SDE_DSPP_GAMUT] = dspp_gamut_install_property; \

	func[SDE_DSPP_GC] = dspp_gc_install_property; \
@@ -128,6 +131,14 @@ enum { 
	SDE_CP_CRTC_DSPP_AD_BACKLIGHT,

	SDE_CP_CRTC_DSPP_AD_STRENGTH,

	SDE_CP_CRTC_DSPP_AD_ROI,

	SDE_CP_CRTC_DSPP_LTM,

	SDE_CP_CRTC_DSPP_LTM_INIT,

	SDE_CP_CRTC_DSPP_LTM_ROI,

	SDE_CP_CRTC_DSPP_LTM_HIST_CTL,

	SDE_CP_CRTC_DSPP_LTM_HIST_THRESH,

	SDE_CP_CRTC_DSPP_LTM_SET_BUF,

	SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF,

	SDE_CP_CRTC_DSPP_LTM_VLUT,

	SDE_CP_CRTC_DSPP_MAX,

	/* DSPP features end */
@@ -1438,6 +1449,64 @@ static void dspp_ad_install_property(struct drm_crtc *crtc) 
	}

}



static void dspp_ltm_install_property(struct drm_crtc *crtc)

{

	char feature_name[256];

	struct sde_kms *kms = NULL;

	struct sde_mdss_cfg *catalog = NULL;

	u32 version;



	kms = get_kms(crtc);

	catalog = kms->catalog;

	version = catalog->dspp[0].sblk->ltm.version >> 16;

	snprintf(feature_name, ARRAY_SIZE(feature_name), "%s%d",

		"SDE_DSPP_LTM_V", version);

	switch (version) {

	case 1:

		sde_cp_crtc_install_immutable_property(crtc,

			feature_name, SDE_CP_CRTC_DSPP_LTM);



		sde_cp_crtc_install_range_property(crtc, "SDE_DSPP_LTM_INIT_V1",

			SDE_CP_CRTC_DSPP_LTM_INIT, 0, U64_MAX, 0);

		sde_cp_create_local_blob(crtc, SDE_CP_CRTC_DSPP_LTM_INIT,

			sizeof(struct drm_msm_ltm_init_param));



		sde_cp_crtc_install_range_property(crtc, "SDE_DSPP_LTM_ROI_V1",

			SDE_CP_CRTC_DSPP_LTM_ROI, 0, U64_MAX, 0);

		sde_cp_create_local_blob(crtc, SDE_CP_CRTC_DSPP_LTM_ROI,

			sizeof(struct drm_msm_ltm_cfg_param));



		sde_cp_crtc_install_enum_property(crtc,

			SDE_CP_CRTC_DSPP_LTM_HIST_CTL, sde_ltm_hist_modes,

			ARRAY_SIZE(sde_ltm_hist_modes),

			"SDE_DSPP_LTM_HIST_CTRL_V1");



		sde_cp_crtc_install_range_property(crtc,

			"SDE_DSPP_LTM_HIST_THRESH_V1",

			SDE_CP_CRTC_DSPP_LTM_HIST_THRESH, 0, (BIT(10) - 1), 0);



		sde_cp_crtc_install_range_property(crtc,

			"SDE_DSPP_LTM_SET_BUF_V1",

			SDE_CP_CRTC_DSPP_LTM_SET_BUF, 0, U64_MAX, 0);

		sde_cp_create_local_blob(crtc, SDE_CP_CRTC_DSPP_LTM_SET_BUF,

			sizeof(struct drm_msm_ltm_buffers_ctrl));



		sde_cp_crtc_install_range_property(crtc,

			"SDE_DSPP_LTM_QUEUE_BUF_V1",

			SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF, 0, U64_MAX, 0);



		sde_cp_crtc_install_range_property(crtc,

			"SDE_DSPP_LTM_VLUT_V1",

			SDE_CP_CRTC_DSPP_LTM_VLUT, 0, U64_MAX, 0);

		sde_cp_create_local_blob(crtc, SDE_CP_CRTC_DSPP_LTM_VLUT,

			sizeof(struct drm_msm_ltm_data));

		break;

	default:

		DRM_ERROR("version %d not supported\n", version);

		break;

	}

}



static void lm_gc_install_property(struct drm_crtc *crtc)

{

	char feature_name[256];

drivers/gpu/drm/msm/sde/sde_color_processing.h

+19 −0
Original line number Diff line number Diff line
@@ -41,6 +41,25 @@ static const struct drm_prop_enum_list sde_hist_modes[] = { 
	{HIST_ENABLED, "hist_on"},

};



/*

 * LTM HISTOGRAM modes

 * @LTM_HIST_DISABLED          Histogram disabled

 * @LTM_HIST_ENABLED           Histogram enabled

 */

enum ltm_hist_modes {

	LTM_HIST_DISABLED,

	LTM_HIST_ENABLED

};



/**

 * struct drm_prop_enum_list - drm structure for creating enum property and

 *                             enumerating values

 */

static const struct drm_prop_enum_list sde_ltm_hist_modes[] = {

	{LTM_HIST_DISABLED, "ltm_hist_off"},

	{LTM_HIST_ENABLED, "ltm_hist_on"},

};



/**

 * sde_cp_crtc_init(): Initialize color processing lists for a crtc.

 *                     Should be called during crtc initialization.

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+44 −2
Original line number Diff line number Diff line
@@ -320,6 +320,12 @@ enum { 
	AD_PROP_MAX,

};



enum {

	LTM_OFF,

	LTM_VERSION,

	LTM_PROP_MAX,

};



enum {

	MIXER_OFF,

	MIXER_LEN,
@@ -604,6 +610,11 @@ static struct sde_prop_type ad_prop[] = { 
	{AD_VERSION, "qcom,sde-dspp-ad-version", false, PROP_TYPE_U32},

};



static struct sde_prop_type ltm_prop[] = {

	{LTM_OFF, "qcom,sde-dspp-ltm-off", false, PROP_TYPE_U32_ARRAY},

	{LTM_VERSION, "qcom,sde-dspp-ltm-version", false, PROP_TYPE_U32},

};



static struct sde_prop_type ds_top_prop[] = {

	{DS_TOP_OFF, "qcom,sde-dest-scaler-top-off", false, PROP_TYPE_U32},

	{DS_TOP_LEN, "qcom,sde-dest-scaler-top-size", false, PROP_TYPE_U32},
@@ -2229,12 +2240,14 @@ static int sde_dspp_parse_dt(struct device_node *np, 
{

	int rc, prop_count[DSPP_PROP_MAX], i;

	int ad_prop_count[AD_PROP_MAX];

	int ltm_prop_count[LTM_PROP_MAX];

	bool prop_exists[DSPP_PROP_MAX], ad_prop_exists[AD_PROP_MAX];

	bool ltm_prop_exists[LTM_PROP_MAX];

	bool blocks_prop_exists[DSPP_BLOCKS_PROP_MAX];

	struct sde_prop_value *ad_prop_value = NULL;

	struct sde_prop_value *ad_prop_value = NULL, *ltm_prop_value = NULL;

	int blocks_prop_count[DSPP_BLOCKS_PROP_MAX];

	struct sde_prop_value *prop_value = NULL, *blocks_prop_value = NULL;

	u32 off_count, ad_off_count;

	u32 off_count, ad_off_count, ltm_off_count;

	struct sde_dspp_cfg *dspp;

	struct sde_dspp_sub_blks *sblk;

	struct device_node *snp = NULL;
@@ -2280,6 +2293,22 @@ static int sde_dspp_parse_dt(struct device_node *np, 
	if (rc)

		goto end;



	/* Parse LTM dtsi entries */

	ltm_prop_value = kcalloc(LTM_PROP_MAX,

			sizeof(struct sde_prop_value), GFP_KERNEL);

	if (!ltm_prop_value) {

		rc = -ENOMEM;

		goto end;

	}

	rc = _validate_dt_entry(np, ltm_prop, ARRAY_SIZE(ltm_prop),

		ltm_prop_count, &ltm_off_count);

	if (rc)

		goto end;

	rc = _read_dt_entry(np, ltm_prop, ARRAY_SIZE(ltm_prop), ltm_prop_count,

		ltm_prop_exists, ltm_prop_value);

	if (rc)

		goto end;



	/* get DSPP feature dt properties if they exist */

	snp = of_get_child_by_name(np, dspp_prop[DSPP_BLOCKS].prop_name);

	if (snp) {
@@ -2331,11 +2360,24 @@ static int sde_dspp_parse_dt(struct device_node *np, 
				AD_VERSION, 0);

			set_bit(SDE_DSPP_AD, &dspp->features);

		}



		sblk->ltm.id = SDE_DSPP_LTM;

		sde_cfg->ltm_count = ltm_off_count;

		if (ltm_prop_value && (i < ltm_off_count) &&

		    ltm_prop_exists[LTM_OFF]) {

			sblk->ltm.base = PROP_VALUE_ACCESS(ltm_prop_value,

				LTM_OFF, i);

			sblk->ltm.version = PROP_VALUE_ACCESS(ltm_prop_value,

				LTM_VERSION, 0);

			set_bit(SDE_DSPP_LTM, &dspp->features);

		}



	}



end:

	kfree(prop_value);

	kfree(ad_prop_value);

	kfree(ltm_prop_value);

	kfree(blocks_prop_value);

	return rc;

}

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+5 −0
Original line number Diff line number Diff line
@@ -248,6 +248,7 @@ enum { 
 * @SDE_DSPP_HIST            Histogram block

 * @SDE_DSPP_VLUT            PA VLUT block

 * @SDE_DSPP_AD              AD block

 * @SDE_DSPP_LTM             LTM block

 * @SDE_DSPP_MAX             maximum value

 */

enum {
@@ -262,6 +263,7 @@ enum { 
	SDE_DSPP_HIST,

	SDE_DSPP_VLUT,

	SDE_DSPP_AD,

	SDE_DSPP_LTM,

	SDE_DSPP_MAX

};
@@ -584,6 +586,7 @@ struct sde_dspp_sub_blks { 
	struct sde_pp_blk dither;

	struct sde_pp_blk hist;

	struct sde_pp_blk ad;

	struct sde_pp_blk ltm;

	struct sde_pp_blk vlut;

};
@@ -1181,6 +1184,7 @@ struct sde_mdss_cfg { 
	struct sde_reg_dma_cfg dma_cfg;



	u32 ad_count;

	u32 ltm_count;



	u32 merge_3d_count;

	struct sde_merge_3d_cfg merge_3d[MAX_BLOCKS];
@@ -1220,6 +1224,7 @@ struct sde_mdss_hw_cfg_handler { 
#define BLK_INTF(s) ((s)->intf)

#define BLK_WB(s) ((s)->wb)

#define BLK_AD(s) ((s)->ad)

#define BLK_LTM(s) ((s)->ltm)



/**

 * sde_hw_catalog_init - sde hardware catalog init API parses dtsi property