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Commit 8057968e authored by Phanindra Babu Pabba's avatar Phanindra Babu Pabba Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: scuba: Add qcrypto node 

Add qcrypto device node to enable
hardware crypto engine operations.

Change-Id: I565e107fbbec789dcd31146785e76607a2f32745
parent 571b9318

qcom/scuba.dtsi

+42 −0
Original line number Diff line number Diff line
@@ -627,6 +627,48 @@ 
		};

	};



	qcom_crypto: qcrypto@1b20000 {

		compatible = "qcom,qcrypto";

		reg = <0x1b20000 0x20000>,

			<0x1b04000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,bam-ee = <0>;

		qcom,ce-hw-shared;

		qcom,clk-mgmt-sus-res;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST

			0 0>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST

			393600 393600>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&rpmcc QCRYPTO_CE1_CLK>,

			<&rpmcc QCRYPTO_CE1_CLK>,

			<&rpmcc QCRYPTO_CE1_CLK>,

			<&rpmcc QCRYPTO_CE1_CLK>;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,use-sw-aead-algo;

		qcom,use-sw-hmac-algo;

		qcom,smmu-s1-enable;

		iommus = <&apps_smmu 0x0084 0x0011>,

			<&apps_smmu 0x0094 0x0011>;

		qcom,iommu-dma = "atomic";

	};



	qcom,mpm2-sleep-counter@4403000 {

		compatible = "qcom,mpm2-sleep-counter";

		reg = <0x4403000 0x1000>;