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Commit 805604ef authored by Russell King's avatar Russell King
Browse files

ARM: l2c: add platform independent core L2 cache OF initialisation 



Add a hook into the core ARM code to perform L2 cache initialisation
in a platform independent manner.  Platforms still get to indicate
their auxiliary control register values and mask, but the
initialisation call will now be made from generic code.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent a4b041a0

arch/arm/include/asm/mach/arch.h

+3 −0
Original line number Diff line number Diff line
@@ -45,6 +45,9 @@ struct machine_desc { 
	unsigned char		reserve_lp1 :1;	/* never has lp1	*/

	unsigned char		reserve_lp2 :1;	/* never has lp2	*/

	enum reboot_mode	reboot_mode;	/* default restart mode	*/

	unsigned		l2c_aux_val;	/* L2 cache aux value	*/

	unsigned		l2c_aux_mask;	/* L2 cache aux mask	*/

	void			(*l2c_write_sec)(unsigned long, unsigned);

	struct smp_operations	*smp;		/* SMP operations	*/

	bool			(*smp_init)(void);

	void			(*fixup)(struct tag *, char **,

arch/arm/kernel/irq.c

+12 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include <linux/proc_fs.h>

#include <linux/export.h>



#include <asm/hardware/cache-l2x0.h>

#include <asm/exception.h>

#include <asm/mach/arch.h>

#include <asm/mach/irq.h>
@@ -115,10 +116,21 @@ EXPORT_SYMBOL_GPL(set_irq_flags); 


void __init init_IRQ(void)

{

	int ret;



	if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)

		irqchip_init();

	else

		machine_desc->init_irq();



	if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&

	    (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {

		outer_cache.write_sec = machine_desc->l2c_write_sec;

		ret = l2x0_of_init(machine_desc->l2c_aux_val,

				   machine_desc->l2c_aux_mask);

		if (ret)

			pr_err("L2C: failed to init: %d\n", ret);

	}

}



#ifdef CONFIG_MULTI_IRQ_HANDLER