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Commit 7fa850ab authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

Pull ARM fixes from Russell King:
 "Some small fixes for this merge window, most of them quite self
  explanatory - the biggest thing here is a fix for the ARMv7 LPAE
  suspend/resume support"

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMER
  ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP
  ARM: 7892/1: Fix warning for V7M builds
  ARM: 7888/1: seccomp: not compatible with ARM OABI
  ARM: 7886/1: make OABI default to off
  ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume
  ARM: 7884/1: mm: Fix ECC mem policy printk
  ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE
  ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE case
  ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE case
  ARM: Fix nommu.c build warning
parents c874e6fc 0c403462

arch/arm/Kconfig

+8 −3
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ config ARM 
	select HARDIRQS_SW_RESEND

	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL

	select HAVE_ARCH_KGDB

	select HAVE_ARCH_SECCOMP_FILTER

	select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)

	select HAVE_ARCH_TRACEHOOK

	select HAVE_BPF_JIT

	select HAVE_CONTEXT_TRACKING
@@ -1496,6 +1496,7 @@ config HAVE_ARM_ARCH_TIMER 
	bool "Architected timer support"

	depends on CPU_V7

	select ARM_ARCH_TIMER

	select GENERIC_CLOCKEVENTS

	help

	  This option enables support for the ARM architected timer
@@ -1719,7 +1720,6 @@ config AEABI 
config OABI_COMPAT

	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"

	depends on AEABI && !THUMB2_KERNEL

	default y

	help

	  This option preserves the old syscall interface along with the

	  new (ARM EABI) one. It also provides a compatibility layer to
@@ -1727,11 +1727,16 @@ config OABI_COMPAT 
	  in memory differs between the legacy ABI and the new ARM EABI

	  (only for non "thumb" binaries). This option adds a tiny

	  overhead to all syscalls and produces a slightly larger kernel.



	  The seccomp filter system will not be available when this is

	  selected, since there is no way yet to sensibly distinguish

	  between calling conventions during filtering.



	  If you know you'll be using only pure EABI user space then you

	  can say N here. If this option is not selected and you attempt

	  to execute a legacy ABI binary then the result will be

	  UNPREDICTABLE (in fact it can be predicted that it won't work

	  at all). If in doubt say Y.

	  at all). If in doubt say N.



config ARCH_HAS_HOLES_MEMORYMODEL

	bool

arch/arm/include/asm/memory.h

+8 −1
Original line number Diff line number Diff line
@@ -226,7 +226,14 @@ static inline phys_addr_t __virt_to_phys(unsigned long x) 
static inline unsigned long __phys_to_virt(phys_addr_t x)

{

	unsigned long t;

	__pv_stub(x, t, "sub", __PV_BITS_31_24);



	/*

	 * 'unsigned long' cast discard upper word when

	 * phys_addr_t is 64 bit, and makes sure that inline

	 * assembler expression receives 32 bit argument

	 * in place where 'r' 32 bit operand is expected.

	 */

	__pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24);

	return t;

}

arch/arm/kernel/head.S

+6 −1
Original line number Diff line number Diff line
@@ -508,6 +508,7 @@ __fixup_smp: 
	teq	r0, #0x0		@ '0' on actual UP A9 hardware

	beq	__fixup_smp_on_up	@ So its an A9 UP

	ldr	r0, [r0, #4]		@ read SCU Config

ARM_BE8(rev	r0, r0)			@ byteswap if big endian

	and	r0, r0, #0x3		@ number of CPUs

	teq	r0, #0x0		@ is 1?

	movne	pc, lr
@@ -643,8 +644,12 @@ ARM_BE8(rev16 ip, ip) 
	ldrcc	r7, [r4], #4	@ use branch for delay slot

	bcc	1b

	bx	lr

#else

#ifdef CONFIG_CPU_ENDIAN_BE8

	moveq	r0, #0x00004000	@ set bit 22, mov to mvn instruction

#else

	moveq	r0, #0x400000	@ set bit 22, mov to mvn instruction

#endif

	b	2f

1:	ldr	ip, [r7, r3]

#ifdef CONFIG_CPU_ENDIAN_BE8
@@ -653,7 +658,7 @@ ARM_BE8(rev16 ip, ip) 
	tst	ip, #0x000f0000	@ check the rotation field

	orrne	ip, ip, r6, lsl #24 @ mask in offset bits 31-24

	biceq	ip, ip, #0x00004000 @ clear bit 22

	orreq	ip, ip, r0, lsl #24 @ mask in offset bits 7-0

	orreq	ip, ip, r0      @ mask in offset bits 7-0

#else

	bic	ip, ip, #0x000000ff

	tst	ip, #0xf00	@ check the rotation field

arch/arm/kernel/traps.c

+1 −1
Original line number Diff line number Diff line
@@ -856,7 +856,7 @@ static void __init kuser_init(void *vectors) 
		memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);

}

#else

static void __init kuser_init(void *vectors)

static inline void __init kuser_init(void *vectors)

{

}

#endif

arch/arm/lib/bitops.h

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ UNWIND( .fnstart ) 
	and	r3, r0, #31		@ Get bit offset

	mov	r0, r0, lsr #5

	add	r1, r1, r0, lsl #2	@ Get word offset

#if __LINUX_ARM_ARCH__ >= 7

#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)

	.arch_extension	mp

	ALT_SMP(W(pldw)	[r1])

	ALT_UP(W(nop))