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Commit 7f4050a0 authored by Will Deacon's avatar Will Deacon
Browse files

ARM: hw_breakpoint: don't try to clear v6 debug registers during boot 



v6 cores do not provide a way to clear the debug registers without first
enabling monitor mode, meaning that we could take spurious debug
exceptions. Instead, rely on the registers being in a sane state when we
boot as they are defined to be disabled out of reset anyway.

Tested-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 614bea50

arch/arm/kernel/hw_breakpoint.c

+3 −3
Original line number Diff line number Diff line
@@ -912,8 +912,8 @@ static void reset_ctrl_regs(void *unused) 
	switch (debug_arch) {

	case ARM_DEBUG_ARCH_V6:

	case ARM_DEBUG_ARCH_V6_1:

		/* ARMv6 cores just need to reset the registers. */

		goto reset_regs;

		/* ARMv6 cores clear the registers out of reset. */

		goto out_mdbgen;

	case ARM_DEBUG_ARCH_V7_ECP14:

		/*

		 * Ensure sticky power-down is clear (i.e. debug logic is
@@ -966,7 +966,6 @@ static void reset_ctrl_regs(void *unused) 
		return;

	}



reset_regs:

	/*

	 * The control/value register pairs are UNKNOWN out of reset so

	 * clear them to avoid spurious debug events.
@@ -991,6 +990,7 @@ static void reset_ctrl_regs(void *unused) 
	 * Have a crack at enabling monitor mode. We don't actually need

	 * it yet, but reporting an error early is useful if it fails.

	 */

out_mdbgen:

	if (enable_monitor_mode())

		cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));

}