Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7f1847eb authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Simplify checking of GPU reset_counter in display pageflips 



If we, when we store the reset_counter for the operation, we ensure that
it is not in a wedged or in the middle of a reset, we can then assert that
if any reset occurs the reset_counter must change. Later we can just
compare the operation's reset epoch against the current counter to see
if we need to abort the operation (to handle the hang).

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1460565315-7748-5-git-send-email-chris@chris-wilson.co.uk
parent c19ae989

drivers/gpu/drm/i915/intel_display.c

+9 −7
Original line number Diff line number Diff line
@@ -3198,14 +3198,12 @@ void intel_finish_reset(struct drm_device *dev) 
static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	unsigned reset_counter;

	bool pending;



	reset_counter = i915_reset_counter(&dev_priv->gpu_error);

	if (intel_crtc->reset_counter != reset_counter ||

	    __i915_reset_in_progress_or_wedged(reset_counter))

	reset_counter = i915_reset_counter(&to_i915(dev)->gpu_error);

	if (intel_crtc->reset_counter != reset_counter)

		return false;



	spin_lock_irq(&dev->event_lock);
@@ -10913,8 +10911,7 @@ static bool page_flip_finished(struct intel_crtc *crtc) 
	unsigned reset_counter;



	reset_counter = i915_reset_counter(&dev_priv->gpu_error);

	if (crtc->reset_counter != reset_counter ||

	    __i915_reset_in_progress_or_wedged(reset_counter))

	if (crtc->reset_counter != reset_counter)

		return true;



	/*
@@ -11576,8 +11573,13 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, 
	if (ret)

		goto cleanup;



	atomic_inc(&intel_crtc->unpin_work_count);

	intel_crtc->reset_counter = i915_reset_counter(&dev_priv->gpu_error);

	if (__i915_reset_in_progress_or_wedged(intel_crtc->reset_counter)) {

		ret = -EIO;

		goto cleanup;

	}



	atomic_inc(&intel_crtc->unpin_work_count);



	if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev))

		work->flip_count = I915_READ(PIPE_FLIPCOUNT_G4X(pipe)) + 1;