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Commit 7ef3d7d5 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branches 'x86/apic', 'x86/asm', 'x86/mm' and 'x86/platform' into... 


Merge branches 'x86/apic', 'x86/asm', 'x86/mm' and 'x86/platform' into x86/core, to merge last updates

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents cb17b2a6 539f5113 7ea402d0 b58d9307

Documentation/ABI/testing/sysfs-devices-system-cpu

+1 −1
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@@ -162,7 +162,7 @@ Description: Discover CPUs in the same CPU frequency coordination domain 
What:		/sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}

Date:		August 2008

KernelVersion:	2.6.27

Contact:	discuss@x86-64.org

Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>

Description:	Disable L3 cache indices



		These files exist in every CPU's cache/index3 directory. Each

Documentation/devicetree/bindings/clock/silabs,si5351.txt

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@@ -17,7 +17,8 @@ Required properties: 
- #clock-cells: from common clock binding; shall be set to 1.

- clocks: from common clock binding; list of parent clock

  handles, shall be xtal reference clock or xtal and clkin for

  si5351c only.

  si5351c only. Corresponding clock input names are "xtal" and

  "clkin" respectively.

- #address-cells: shall be set to 1.

- #size-cells: shall be set to 0.
@@ -71,6 +72,7 @@ i2c-master-node { 


		/* connect xtal input to 25MHz reference */

		clocks = <&ref25>;

		clock-names = "xtal";



		/* connect xtal input as source of pll0 and pll1 */

		silabs,pll-source = <0 0>, <1 0>;

Documentation/devicetree/bindings/mtd/m25p80.txt→Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt

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@@ -8,8 +8,8 @@ Required properties: 
               is not Linux-only, but in case of Linux, see the "m25p_ids"

               table in drivers/mtd/devices/m25p80.c for the list of supported

               chips.

               Must also include "nor-jedec" for any SPI NOR flash that can be

               identified by the JEDEC READ ID opcode (0x9F).

               Must also include "jedec,spi-nor" for any SPI NOR flash that can

               be identified by the JEDEC READ ID opcode (0x9F).

- reg : Chip-Select number

- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
@@ -25,7 +25,7 @@ Example: 
	flash: m25p80@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "spansion,m25p80", "nor-jedec";

		compatible = "spansion,m25p80", "jedec,spi-nor";

		reg = <0>;

		spi-max-frequency = <40000000>;

		m25p,fast-read;

Documentation/devicetree/bindings/net/cdns-emac.txt

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@@ -3,7 +3,8 @@ 
Required properties:

- compatible: Should be "cdns,[<chip>-]{emac}"

  Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.

  or the generic form: "cdns,emac".

  Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.

  Or the generic form: "cdns,emac".

- reg: Address and length of the register set for the device

- interrupts: Should contain macb interrupt

- phy-mode: see ethernet.txt file in the same directory.

Documentation/hwmon/tmp401

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@@ -20,7 +20,7 @@ Supported chips: 
    Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp432.html

  * Texas Instruments TMP435

    Prefix: 'tmp435'

    Addresses scanned: I2C 0x37, 0x48 - 0x4f

    Addresses scanned: I2C 0x48 - 0x4f

    Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp435.html



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