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Commit 7ef3844f authored by Paul Cercueil's avatar Paul Cercueil Committed by Stephen Boyd
Browse files

clk: ingenic: Add support for clocks whose gate bit is inverted 



Support the clocks which are gated when their gate bit is cleared
instead of set.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 60cc43fc

drivers/clk/ingenic/cgu.c

+3 −2
Original line number Diff line number Diff line
@@ -43,7 +43,8 @@ static inline bool 
ingenic_cgu_gate_get(struct ingenic_cgu *cgu,

		     const struct ingenic_cgu_gate_info *info)

{

	return readl(cgu->base + info->reg) & BIT(info->bit);

	return !!(readl(cgu->base + info->reg) & BIT(info->bit))

		^ info->clear_to_gate;

}



/**
@@ -62,7 +63,7 @@ ingenic_cgu_gate_set(struct ingenic_cgu *cgu, 
{

	u32 clkgr = readl(cgu->base + info->reg);



	if (val)

	if (val ^ info->clear_to_gate)

		clkgr |= BIT(info->bit);

	else

		clkgr &= ~BIT(info->bit);

drivers/clk/ingenic/cgu.h

+2 −0
Original line number Diff line number Diff line
@@ -111,10 +111,12 @@ struct ingenic_cgu_fixdiv_info { 
 * struct ingenic_cgu_gate_info - information about a clock gate

 * @reg: offset of the gate control register within the CGU

 * @bit: offset of the bit in the register that controls the gate

 * @clear_to_gate: if set, the clock is gated when the bit is cleared

 */

struct ingenic_cgu_gate_info {

	unsigned reg;

	u8 bit;

	bool clear_to_gate;

};



/**