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Commit 7e3eb599 authored by Nagaraju, Vathsala's avatar Nagaraju, Vathsala Committed by Rodrigo Vivi
Browse files

drm/i915/psr: report psr2 hw enabled from psr2_ctl 



For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
for psr1, bit 31 in SRD_CTL to be set. Reporting
"HW Enabled & Active bit" status for psr2 from SRD_CTL
gives  wrong status.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: default avatarvathsala nagaraju <vathsala.nagaraju@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481307129-29354-1-git-send-email-vathsala.nagaraju@intel.com
parent 16d98b31

drivers/gpu/drm/i915/i915_debugfs.c

+6 −3
Original line number Diff line number Diff line
@@ -2567,9 +2567,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) 
	seq_printf(m, "Re-enable work scheduled: %s\n",

		   yesno(work_busy(&dev_priv->psr.work.work)));



	if (HAS_DDI(dev_priv))

	if (HAS_DDI(dev_priv)) {

		if (dev_priv->psr.psr2_support)

			enabled = I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE;

		else

			enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;

	else {

	} else {

		for_each_pipe(dev_priv, pipe) {

			enum transcoder cpu_transcoder =

				intel_pipe_to_cpu_transcoder(dev_priv, pipe);