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Commit 7e0e314f authored by Clemens Ladisch's avatar Clemens Ladisch
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firewire: core: add CSR abdicate support



Implement the abdicate bit, which is required for bus manager
capable nodes and tested by the Base 1394 Test Suite.

Finally, something to do at a command reset!  :-)

Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
parent 4ffb7a6a
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+2 −1
Original line number Diff line number Diff line
@@ -260,7 +260,8 @@ static void fw_card_bm_work(struct work_struct *work)

	grace = time_after(jiffies, card->reset_jiffies + DIV_ROUND_UP(HZ, 8));

	if (is_next_generation(generation, card->bm_generation) ||
	if ((is_next_generation(generation, card->bm_generation) &&
	     !card->bm_abdicate) ||
	    (card->bm_generation != generation && grace)) {
		/*
		 * This first step is to figure out who is IRM and
+2 −0
Original line number Diff line number Diff line
@@ -552,6 +552,8 @@ void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation,
	smp_wmb();
	card->generation = generation;
	card->reset_jiffies = jiffies;
	card->bm_abdicate = card->csr_abdicate;
	card->csr_abdicate = false;
	fw_schedule_bm_work(card, 0);

	local_node = build_tree(card, self_ids, self_id_count);
+11 −2
Original line number Diff line number Diff line
@@ -1008,6 +1008,10 @@ static u32 read_state_register(struct fw_card *card)
	/* Bit 8 (cmstr): */
	value |= card->driver->read_csr_reg(card, CSR_STATE_CLEAR);

	/* Bit 10 (abdicate): */
	if (card->csr_abdicate)
		value |= CSR_STATE_BIT_ABDICATE;

	return value;
}

@@ -1041,6 +1045,8 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
		} else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
			card->driver->write_csr_reg(card, CSR_STATE_CLEAR,
						    be32_to_cpu(*data));
			if (*data & cpu_to_be32(CSR_STATE_BIT_ABDICATE))
				card->csr_abdicate = false;
		} else {
			rcode = RCODE_TYPE_ERROR;
		}
@@ -1052,7 +1058,8 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
		} else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
			card->driver->write_csr_reg(card, CSR_STATE_SET,
						    be32_to_cpu(*data));
			/* FIXME: implement abdicate */
			if (*data & cpu_to_be32(CSR_STATE_BIT_ABDICATE))
				card->csr_abdicate = true;
		} else {
			rcode = RCODE_TYPE_ERROR;
		}
@@ -1070,7 +1077,9 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
		break;

	case CSR_RESET_START:
		if (tcode != TCODE_WRITE_QUADLET_REQUEST)
		if (tcode == TCODE_WRITE_QUADLET_REQUEST)
			card->csr_abdicate = false;
		else
			rcode = RCODE_TYPE_ERROR;
		break;

+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ struct fw_packet;
#define FEATURE_PRIORITY_BUDGET		0x01

#define CSR_STATE_BIT_CMSTR	(1 << 8)
#define CSR_STATE_BIT_ABDICATE	(1 << 10)

struct fw_card_driver {
	/*
+2 −0
Original line number Diff line number Diff line
@@ -119,6 +119,8 @@ struct fw_card {
	int bm_retries;
	int bm_generation;
	__be32 bm_transaction_data[2];
	bool bm_abdicate; /* value of csr_abdicate before last bus reset */
	bool csr_abdicate; /* visible in CSR STATE_CLEAR/SET registers */

	bool broadcast_channel_allocated;
	u32 broadcast_channel;