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Commit 7dd49065 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
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drm/i915: Mark untiled BLT commands as fenced on gen2/3 



The BLT commands on gen2/3 utilize the fence registers and so we cannot
modify any fences for the object whilst those commands are in flight.
Currently we marked tiled commands as occupying a fence, but forgot to
restrict the untiled commands from preventing a fence being assigned
before they were completed.

One side-effect is that we ten have to double check that a fence was
allocated for a fenced buffer during move-to-active.

Reported-by: default avatarJiri Slaby <jirislaby@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43427
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47990


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Testcase: i-g-t/tests/gem_tiled_after_untiled_blt
Tested-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 55a254ac

drivers/gpu/drm/i915/i915_gem.c

+9 −6
Original line number Diff line number Diff line
@@ -1472,16 +1472,19 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, 
	list_move_tail(&obj->ring_list, &ring->active_list);



	obj->last_rendering_seqno = seqno;

	if (obj->fenced_gpu_access) {

		struct drm_i915_fence_reg *reg;



		BUG_ON(obj->fence_reg == I915_FENCE_REG_NONE);



	if (obj->fenced_gpu_access) {

		obj->last_fenced_seqno = seqno;

		obj->last_fenced_ring = ring;



		/* Bump MRU to take account of the delayed flush */

		if (obj->fence_reg != I915_FENCE_REG_NONE) {

			struct drm_i915_fence_reg *reg;



			reg = &dev_priv->fence_regs[obj->fence_reg];

		list_move_tail(&reg->lru_list, &dev_priv->mm.fence_list);

			list_move_tail(&reg->lru_list,

				       &dev_priv->mm.fence_list);

		}

	}

}

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+1 −1
Original line number Diff line number Diff line
@@ -498,8 +498,8 @@ pin_and_fence_object(struct drm_i915_gem_object *obj, 
				if (ret)

					goto err_unpin;

			}

			obj->pending_fenced_gpu_access = true;

		}

		obj->pending_fenced_gpu_access = need_fence;

	}



	entry->offset = obj->gtt_offset;