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Commit 7dab9ef4 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI/ACPI: Name _OSC #defines more consistently 



Make PCI Host Bridge _OSC #defines more consistent.  No functional change.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 335b1509

drivers/acpi/pci_root.c

+9 −10
Original line number Diff line number Diff line
@@ -49,10 +49,10 @@ static int acpi_pci_root_add(struct acpi_device *device, 
			     const struct acpi_device_id *not_used);

static void acpi_pci_root_remove(struct acpi_device *device);



#define ACPI_PCIE_REQ_SUPPORT (OSC_EXT_PCI_CONFIG_SUPPORT \

				| OSC_ACTIVE_STATE_PWR_SUPPORT \

				| OSC_CLOCK_PWR_CAPABILITY_SUPPORT \

				| OSC_MSI_SUPPORT)

#define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \

				| OSC_PCI_ASPM_SUPPORT \

				| OSC_PCI_CLOCK_PM_SUPPORT \

				| OSC_PCI_MSI_SUPPORT)



static const struct acpi_device_id root_device_ids[] = {

	{"PNP0A03", 0},
@@ -439,13 +439,12 @@ static int acpi_pci_root_add(struct acpi_device *device, 
	acpi_pci_osc_support(root, flags);



	if (pci_ext_cfg_avail())

		flags |= OSC_EXT_PCI_CONFIG_SUPPORT;

		flags |= OSC_PCI_EXT_CONFIG_SUPPORT;

	if (pcie_aspm_support_enabled()) {

		flags |= OSC_ACTIVE_STATE_PWR_SUPPORT |

		OSC_CLOCK_PWR_CAPABILITY_SUPPORT;

		flags |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;

	}

	if (pci_msi_enabled())

		flags |= OSC_MSI_SUPPORT;

		flags |= OSC_PCI_MSI_SUPPORT;

	if (flags != base_flags) {

		status = acpi_pci_osc_support(root, flags);

		if (ACPI_FAILURE(status)) {
@@ -458,7 +457,7 @@ static int acpi_pci_root_add(struct acpi_device *device, 


	if (!pcie_ports_disabled

	    && (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {

		flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL

		flags = OSC_PCI_EXPRESS_CAPABILITY_CONTROL

			| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL

			| OSC_PCI_EXPRESS_PME_CONTROL;
@@ -474,7 +473,7 @@ static int acpi_pci_root_add(struct acpi_device *device, 
			"Requesting ACPI _OSC control (0x%02x)\n", flags);



		status = acpi_pci_osc_control_set(handle, &flags,

				       OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);

				       OSC_PCI_EXPRESS_CAPABILITY_CONTROL);

		if (ACPI_SUCCESS(status)) {

			dev_info(&device->dev,

				"ACPI _OSC control (0x%02x) granted\n", flags);

drivers/pci/hotplug/acpi_pcihp.c

+1 −1
Original line number Diff line number Diff line
@@ -338,7 +338,7 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags) 
	acpi_handle chandle, handle;

	struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };



	flags &= OSC_SHPC_NATIVE_HP_CONTROL;

	flags &= OSC_PCI_SHPC_NATIVE_HP_CONTROL;

	if (!flags) {

		err("Invalid flags %u specified!\n", flags);

		return -EINVAL;

drivers/pci/hotplug/shpchp.h

+1 −1
Original line number Diff line number Diff line
@@ -191,7 +191,7 @@ static inline const char *slot_name(struct slot *slot) 
#include <linux/pci-acpi.h>

static inline int get_hp_hw_control_from_firmware(struct pci_dev *dev)

{

	u32 flags = OSC_SHPC_NATIVE_HP_CONTROL;

	u32 flags = OSC_PCI_SHPC_NATIVE_HP_CONTROL;

	return acpi_get_hp_hw_control_from_firmware(dev, flags);

}

#else

include/linux/acpi.h

+6 −6
Original line number Diff line number Diff line
@@ -325,19 +325,19 @@ acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context); 
extern bool osc_sb_apei_support_acked;



/* PCI Host Bridge _OSC: Capabilities DWORD 2: Support Field */

#define OSC_EXT_PCI_CONFIG_SUPPORT		0x00000001

#define OSC_ACTIVE_STATE_PWR_SUPPORT		0x00000002

#define OSC_CLOCK_PWR_CAPABILITY_SUPPORT	0x00000004

#define OSC_PCI_EXT_CONFIG_SUPPORT		0x00000001

#define OSC_PCI_ASPM_SUPPORT			0x00000002

#define OSC_PCI_CLOCK_PM_SUPPORT		0x00000004

#define OSC_PCI_SEGMENT_GROUPS_SUPPORT		0x00000008

#define OSC_MSI_SUPPORT				0x00000010

#define OSC_PCI_MSI_SUPPORT			0x00000010

#define OSC_PCI_SUPPORT_MASKS			0x0000001f



/* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */

#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL	0x00000001

#define OSC_SHPC_NATIVE_HP_CONTROL		0x00000002

#define OSC_PCI_SHPC_NATIVE_HP_CONTROL		0x00000002

#define OSC_PCI_EXPRESS_PME_CONTROL		0x00000004

#define OSC_PCI_EXPRESS_AER_CONTROL		0x00000008

#define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL	0x00000010

#define OSC_PCI_EXPRESS_CAPABILITY_CONTROL	0x00000010

#define OSC_PCI_CONTROL_MASKS			0x0000001f



extern acpi_status acpi_pci_osc_control_set(acpi_handle handle,