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Commit 7cedb987 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Documentation: Add description for ubwc fetch/write config"

parents 7d038aac 80d452d2
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+30 −4
Original line number Diff line number Diff line
@@ -136,10 +136,31 @@ and name of firmware image.
  Value type: <string>
  Definition: Name of firmware image.

- ubwc-cfg
- ubwc-ipe-fetch-cfg
  Usage: required
  Value type: <u32>
  Definition: UBWC IPE fetch configuration based on DDR device type.

- ubwc-ipe-write-cfg
  Usage: required
  Value type: <u32>
  Definition: UBWC configuration.
  Definition: UBWC IPE write configuration based on DDR device type.

- ubwc-bps-fetch-cfg
  Usage: required
  Value type: <u32>
  Definition: UBWC BPS fetch configuration based on DDR device type.

- ubwc-bps-write-cfg
  Usage: required
  Value type: <u32>
  Definition: UBWC BPS write configuration based on DDR device type.

- ubwc-cfg
  Usage: optional
  Value type: <u32>
  Definition: UBWC configuration, this is mandatory if above
              ipe/bps ubwc properties are not used.

Examples:
a5: qcom,a5@ac00000 {
@@ -179,8 +200,13 @@ a5: qcom,a5@ac00000 {
	clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>;
	clock-cntl-level = "turbo";
	fw_name = "CAMERA_ICP.elf";
	ubwc-cfg = <0x7F 0x1FF>;
};
	/* "ubwc-cfg" is not used, even if defined the new property
	tags will be priortized. If the new properties are not used
	please specify "ubwc-cfg" in that case */
	ubwc-ipe-fetch-cfg = <0x707b 0x7083>;
	ubwc-ipe-write-cfg = <0x161ef 0x1620f>;
	ubwc-bps-fetch-cfg = <0x707b 0x7083>
	ubwc-bps-write-cfg = <0x161ef 0x1620f>;

qcom,ipe0 {
	cell-index = <0>;
+5 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@
#include <linux/regulator/consumer.h>
#include <linux/clk/qcom.h>
#include <linux/debugfs.h>
#include <linux/of_fdt.h>

#include "cam_io_util.h"

@@ -34,6 +35,10 @@
/* maximum number of device clock */
#define CAM_SOC_MAX_CLK             32

/* DDR device types */
#define DDR_TYPE_LPDDR4       6
#define DDR_TYPE_LPDDR5       9

/**
 * enum cam_vote_level - Enum for voting level
 *