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Commit 7ca791c5 authored by Shawn Guo's avatar Shawn Guo Committed by Russell King
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ARM: 8089/1: cpu_pj4b_suspend_size should base on cpu_v7_suspend_size



Since pj4b suspend/resume routines are implemented based on generic
ARMv7 ones, instead of hard-coding cpu_pj4b_suspend_size, we should have
it be cpu_v7_suspend_size plus pj4b specific bytes.  Otherwise, if
cpu_v7_suspend_size gets updated alone, the pj4b suspend/resume will
likely be broken.

While at it, fix the comments in cpu_pj4b_do_resume, as we're restoring
CP15 registers rather than saving in there.

Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
Acked-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 76e7d5c4
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+6 −6
Original line number Diff line number Diff line
@@ -184,16 +184,16 @@ ENDPROC(cpu_pj4b_do_suspend)

ENTRY(cpu_pj4b_do_resume)
	ldmia	r0!, {r6 - r10}
	mcr	p15, 1, r6, c15, c1, 0  @ save CP15 - extra features
	mcr	p15, 1, r7, c15, c2, 0	@ save CP15 - Aux Func Modes Ctrl 0
	mcr	p15, 1, r8, c15, c1, 2	@ save CP15 - Aux Debug Modes Ctrl 2
	mcr	p15, 1, r9, c15, c1, 1  @ save CP15 - Aux Debug Modes Ctrl 1
	mcr	p15, 0, r10, c9, c14, 0  @ save CP15 - PMC
	mcr	p15, 1, r6, c15, c1, 0  @ restore CP15 - extra features
	mcr	p15, 1, r7, c15, c2, 0	@ restore CP15 - Aux Func Modes Ctrl 0
	mcr	p15, 1, r8, c15, c1, 2	@ restore CP15 - Aux Debug Modes Ctrl 2
	mcr	p15, 1, r9, c15, c1, 1  @ restore CP15 - Aux Debug Modes Ctrl 1
	mcr	p15, 0, r10, c9, c14, 0  @ restore CP15 - PMC
	b cpu_v7_do_resume
ENDPROC(cpu_pj4b_do_resume)
#endif
.globl	cpu_pj4b_suspend_size
.equ	cpu_pj4b_suspend_size, 4 * 14
.equ	cpu_pj4b_suspend_size, cpu_v7_suspend_size + 4 * 5

#endif