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Commit 7bfb40b0 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

Merge remote-tracking branch 'origin/master' into next 

(Pickup Stephen's fix d4d7b2a1)
parents 9bb7361d 9e79e3e9

MAINTAINERS

+4 −4
Original line number Diff line number Diff line
@@ -2649,11 +2649,11 @@ F: drivers/net/wan/dlci.c 
F:	drivers/net/wan/sdla.c



FRAMEBUFFER LAYER

M:	Paul Mundt <lethal@linux-sh.org>

M:	Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

L:	linux-fbdev@vger.kernel.org

W:	http://linux-fbdev.sourceforge.net/

Q:	http://patchwork.kernel.org/project/linux-fbdev/list/

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6.git

T:	git git://github.com/schandinat/linux-2.6.git fbdev-next

S:	Maintained

F:	Documentation/fb/

F:	Documentation/devicetree/bindings/fb/
@@ -4450,8 +4450,8 @@ M: "David S. Miller" <davem@davemloft.net> 
L:	netdev@vger.kernel.org

W:	http://www.linuxfoundation.org/en/Net

W:	http://patchwork.ozlabs.org/project/netdev/list/

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6.git

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git

S:	Maintained

F:	net/

F:	include/net/

arch/arm/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -1271,6 +1271,18 @@ config ARM_ERRATA_754327 
	  This workaround defines cpu_relax() as smp_mb(), preventing correctly

	  written polling loops from denying visibility of updates to memory.



config ARM_ERRATA_364296

	bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"

	depends on CPU_V6 && !SMP

	help

	  This options enables the workaround for the 364296 ARM1136

	  r0p2 erratum (possible cache data corruption with

	  hit-under-miss enabled). It sets the undocumented bit 31 in

	  the auxiliary control register and the FI bit in the control

	  register, thus disabling hit-under-miss without putting the

	  processor into full low interrupt latency mode. ARM11MPCore

	  is not affected.



endmenu



source "arch/arm/common/Kconfig"

arch/arm/boot/compressed/mmcif-sh7372.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ asmlinkage void mmc_loader(unsigned char *buf, unsigned long len) 




	/* Disable clock to MMC hardware block */

	__raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);

	__raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);



	mmc_update_progress(MMC_PROGRESS_DONE);

}

arch/arm/boot/compressed/sdhi-sh7372.c

+1 −1
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ asmlinkage void mmc_loader(unsigned short *buf, unsigned long len) 
		goto err;



        /* Disable clock to SDHI1 hardware block */

        __raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3);

        __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);



	mmc_update_progress(MMC_PROGRESS_DONE);

arch/arm/include/asm/hardware/cache-l2x0.h

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ 
#define L2X0_AUX_CTRL_MASK			0xc0000fff

#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT	16

#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT		17

#define L2X0_AUX_CTRL_WAY_SIZE_MASK		(0x3 << 17)

#define L2X0_AUX_CTRL_WAY_SIZE_MASK		(0x7 << 17)

#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT	22

#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT		26

#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT		27