Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7b827835 authored by Aristeu Rozanski's avatar Aristeu Rozanski Committed by Mauro Carvalho Chehab
Browse files

edac: add DDR4 and RDDR4 



Haswell memory controller can make use of DDR4 and Registered DDR4

Cc: tony.luck@intel.com
Signed-off-by: default avatarAristeu Rozanski <aris@redhat.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent adc61bcd

drivers/edac/edac_mc_sysfs.c

+3 −1
Original line number Diff line number Diff line
@@ -108,7 +108,9 @@ static const char * const mem_types[] = { 
	[MEM_RDDR2] = "Registered-DDR2",

	[MEM_XDR] = "XDR",

	[MEM_DDR3] = "Unbuffered-DDR3",

	[MEM_RDDR3] = "Registered-DDR3"

	[MEM_RDDR3] = "Registered-DDR3",

	[MEM_DDR4] = "Unbuffered-DDR4",

	[MEM_RDDR4] = "Registered-DDR4"

};



static const char * const dev_types[] = {

include/linux/edac.h

+5 −0
Original line number Diff line number Diff line
@@ -194,6 +194,9 @@ static inline char *mc_event_error_type(const unsigned int err_type) 
 * @MEM_DDR3:		DDR3 RAM

 * @MEM_RDDR3:		Registered DDR3 RAM

 *			This is a variant of the DDR3 memories.

 * @MEM_DDR4:		DDR4 RAM

 * @MEM_RDDR4:		Registered DDR4 RAM

 *			This is a variant of the DDR4 memories.

 */

enum mem_type {

	MEM_EMPTY = 0,
@@ -213,6 +216,8 @@ enum mem_type { 
	MEM_XDR,

	MEM_DDR3,

	MEM_RDDR3,

	MEM_DDR4,

	MEM_RDDR4,

};



#define MEM_FLAG_EMPTY		BIT(MEM_EMPTY)