drivers/staging/iio/adc/ad7192.c
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drivers/staging/iio/adc/ad7192.h
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New driver for AD7190/AD7192/AD7195 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA These devices features a dual use data out ready DOUT/RDY output. In order to avoid contentions on the SPI bus, it's necessary to use spi bus locking. The DOUT/RDY output must also be wired to an interrupt capable GPIO. In INDIO_RING_TRIGGERED mode, this driver may block its SPI bus segment for an extended period of time. Changes since V1: Add missing documentation. Remove obsoleted include files. Fix typos and style issues. Fix buffer size. Split ad7192_show() into two functions. Avoid race condition add mutex. Abandon IIO_CHAN macro. Reorder elements in ad7192_platform_data. Remove driver bus type. Signed-off-by:Michael Hennerich <michael.hennerich@analog.com> Acked-by:
Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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