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Commit 79eb238c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'tty-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 

Pull tty / serial driver update from Greg KH:
 "Here's the big tty / serial driver update for 3.17-rc1.

  Nothing major, just a number of fixes and new features for different
  serial drivers, and some more tty core fixes and documentation of the
  tty locks.

  All of these have been in linux-next for a while"

* tag 'tty-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (82 commits)
  tty/n_gsm.c: fix a memory leak in gsmld_open
  pch_uart: don't hardcode PCI slot to get DMA device
  tty: n_gsm, use setup_timer
  Revert "ARC: [arcfpga] stdout-path now suffices for earlycon/console"
  serial: sc16is7xx: Correct initialization of s->clk
  serial: 8250_dw: Add support for deferred probing
  serial: 8250_dw: Add optional reset control support
  serial: st-asc: Fix overflow in baudrate calculation
  serial: st-asc: Don't call BUG in asc_console_setup()
  tty: serial: msm: Make of_device_id array const
  tty/n_gsm.c: get gsm->num after gsm_activate_mux
  serial/core: Fix too big allocation for attribute member
  drivers/tty/serial: use correct type for dma_map/unmap
  serial: altera_jtaguart: Fix putchar function passed to uart_console_write()
  serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers
  Serial: allow port drivers to have a default attribute group
  tty: kgdb_nmi: Automatically manage tty enable
  serial: altera_jtaguart: Adpot uart_console_write()
  serial: samsung: improve code clarity by defining a variable
  serial: samsung: correct the case and default order in switch
  ...
parents 53ee9833 5a640967

Documentation/ABI/testing/sysfs-tty

+16 −0
Original line number Diff line number Diff line
@@ -138,3 +138,19 @@ Description: 


		 These sysfs values expose the TIOCGSERIAL interface via

		 sysfs rather than via ioctls.



What:		/sys/class/tty/ttyS0/rx_trig_bytes

Date:		May 2014

Contact:	Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>

Description:

		 Shows current RX interrupt trigger bytes or sets the

		 user specified value to change it for the FIFO buffer.

		 Users can show or set this value regardless of opening the

		 serial device file or not.



		 The RX trigger can be set one of four kinds of values for UART

		 serials. When users input a meaning less value to this I/F,

		 the RX trigger is changed to the nearest lower value for the

		 device specification. For example, when user sets 7bytes on

		 16550A, which has 1/4/8/14 bytes trigger, the RX trigger is

		 automatically changed to 4 bytes.

Documentation/devicetree/bindings/serial/efm32-uart.txt

+2 −2
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ Required properties: 
- interrupts : Should contain uart interrupt



Optional properties:

- efm32,location : Decides the location of the USART I/O pins.

- energymicro,location : Decides the location of the USART I/O pins.

  Allowed range : [0 .. 5]

  Default: 0
@@ -16,5 +16,5 @@ uart@0x4000c400 { 
	compatible = "energymicro,efm32-uart";

	reg = <0x4000c400 0x400>;

	interrupts = <15>;

	efm32,location = <0>;

	energymicro,location = <0>;

};

Documentation/devicetree/bindings/serial/fsl-lpuart.txt

+5 −1
Original line number Diff line number Diff line 
* Freescale low power universal asynchronous receiver/transmitter (lpuart)



Required properties:

- compatible : Should be "fsl,<soc>-lpuart"

- compatible :

  - "fsl,vf610-lpuart" for lpuart compatible with the one integrated

    on Vybrid vf610 SoC with 8-bit register organization

  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated

    on LS1021A SoC with 32-bit big-endian register organization

- reg : Address and length of the register set for the device

- interrupts : Should contain uart interrupt

- clocks : phandle + clock specifier pairs, one for each entry in clock-names

Documentation/devicetree/bindings/serial/samsung_uart.txt

+50 −6
Original line number Diff line number Diff line 
* Samsung's UART Controller



The Samsung's UART controller is used for interfacing SoC with serial communicaion

devices.

The Samsung's UART controller is used for interfacing SoC with serial

communicaion devices.



Required properties:

- compatible: should be

  - "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports.

- compatible: should be one of following:

  - "samsung,exynos4210-uart" -  Exynos4210 SoC,

  - "samsung,s3c2410-uart" - compatible with ports present on S3C2410 SoC,

  - "samsung,s3c2412-uart" - compatible with ports present on S3C2412 SoC,

  - "samsung,s3c2440-uart" - compatible with ports present on S3C2440 SoC,

  - "samsung,s3c6400-uart" - compatible with ports present on S3C6400 SoC,

  - "samsung,s5pv210-uart" - compatible with ports present on S5PV210 SoC.



- reg: base physical address of the controller and length of memory mapped

  region.



- interrupts: interrupt number to the cpu. The interrupt specifier format depends

  on the interrupt controller parent.
 
- interrupts: a single interrupt signal to SoC interrupt controller,

  according to interrupt bindings documentation [1].



- clock-names: input names of clocks used by the controller:

  - "uart" - controller bus clock,

  - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...),

    according to SoC User's Manual (only N = 0 is allowedfor SoCs without

    internal baud clock mux).

- clocks: phandles and specifiers for all clocks specified in "clock-names"

  property, in the same order, according to clock bindings documentation [2].



[1] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

[2] Documentation/devicetree/bindings/clock/clock-bindings.txt



Optional properties:

- samsung,uart-fifosize: The fifo size supported by the UART channel



Note: Each Samsung UART should have an alias correctly numbered in the

"aliases" node, according to serialN format, where N is the port number

(non-negative decimal integer) as specified by User's Manual of respective

SoC.



Example:

	aliases {

		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;

	};



Example:

	uart1: serial@7f005400 {

		compatible = "samsung,s3c6400-uart";

		reg = <0x7f005400 0x100>;

		interrupt-parent = <&vic1>;

		interrupts = <6>;

		clock-names = "uart", "clk_uart_baud2",

				"clk_uart_baud3";

		clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,

				<&clocks SCLK_UART>;

		samsung,uart-fifosize = <16>;

	};

Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt

+32 −0
Original line number Diff line number Diff line
@@ -4,9 +4,18 @@ Required properties: 
- compatible : "snps,dw-apb-uart"

- reg : offset and length of the register set for the device.

- interrupts : should contain uart interrupt.



Clock handling:

The clock rate of the input clock needs to be supplied by one of

- clock-frequency : the input clock frequency for the UART.

- clocks : phandle to the input clock



The supplying peripheral clock can also be handled, needing a second property

- clock-names: tuple listing input clock names.

	Required elements: "baudclk", "apb_pclk"



Optional properties:

- resets : phandle to the parent reset controller.

- reg-shift : quantity to shift the register offsets by.  If this property is

  not present then the register offsets are not shifted.

- reg-io-width : the size (in bytes) of the IO accesses that should be
@@ -23,3 +32,26 @@ Example: 
		reg-shift = <2>;

		reg-io-width = <4>;

	};



Example with one clock:



	uart@80230000 {

		compatible = "snps,dw-apb-uart";

		reg = <0x80230000 0x100>;

		clocks = <&baudclk>;

		interrupts = <10>;

		reg-shift = <2>;

		reg-io-width = <4>;

	};



Example with two clocks:



	uart@80230000 {

		compatible = "snps,dw-apb-uart";

		reg = <0x80230000 0x100>;

		clocks = <&baudclk>, <&apb_pclk>;

		clock-names = "baudclk", "apb_pclk";

		interrupts = <10>;

		reg-shift = <2>;

		reg-io-width = <4>;

	};