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Commit 79c28acb authored by Grant Likely's avatar Grant Likely
Browse files

of-bindings: Add binding documentation for SPI busses and devices 



Add documentation about how to describe SPI busses in the device tree.

Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
Acked-by: default avatarSegher Boessenkool <segher@kernel.crashing.org>
parent a19dd1bd

Documentation/powerpc/booting-without-of.txt

+57 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ Table of Contents 
      p) Freescale Synchronous Serial Interface

	  q) USB EHCI controllers

      r) MDIO on GPIOs

      s) SPI busses



  VII - Marvell Discovery mv64[345]6x System Controller chips

    1) The /system-controller node
@@ -1881,6 +1882,62 @@ platforms are moved over to use the flattened-device-tree model. 
			 &qe_pio_c 6>;

	};



    s) SPI (Serial Peripheral Interface) busses



    SPI busses can be described with a node for the SPI master device

    and a set of child nodes for each SPI slave on the bus.  For this

    discussion, it is assumed that the system's SPI controller is in

    SPI master mode.  This binding does not describe SPI controllers

    in slave mode.



    The SPI master node requires the following properties:

    - #address-cells  - number of cells required to define a chip select

			address on the SPI bus.

    - #size-cells     - should be zero.

    - compatible      - name of SPI bus controller following generic names

			recommended practice.

    No other properties are required in the SPI bus node.  It is assumed

    that a driver for an SPI bus device will understand that it is an SPI bus.

    However, the binding does not attempt to define the specific method for

    assigning chip select numbers.  Since SPI chip select configuration is

    flexible and non-standardized, it is left out of this binding with the

    assumption that board specific platform code will be used to manage

    chip selects.  Individual drivers can define additional properties to

    support describing the chip select layout.



    SPI slave nodes must be children of the SPI master node and can

    contain the following properties.

    - reg             - (required) chip select address of device.

    - compatible      - (required) name of SPI device following generic names

			recommended practice

    - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz

    - spi-cpol        - (optional) Empty property indicating device requires

			inverse clock polarity (CPOL) mode

    - spi-cpha        - (optional) Empty property indicating device requires

			shifted clock phase (CPHA) mode



    SPI example for an MPC5200 SPI bus:

		spi@f00 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";

			reg = <0xf00 0x20>;

			interrupts = <2 13 0 2 14 0>;

			interrupt-parent = <&mpc5200_pic>;



			ethernet-switch@0 {

				compatible = "micrel,ks8995m";

				spi-max-frequency = <1000000>;

				reg = <0>;

			};



			codec@1 {

				compatible = "ti,tlv320aic26";

				spi-max-frequency = <100000>;

				reg = <1>;

			};

		};



VII - Marvell Discovery mv64[345]6x System Controller chips

===========================================================