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Commit 796ceb92 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Laurent Pinchart
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drm: rcar-du: lvds: Fix LVDS startup on R-Car Gen3 



According to the latest revisions of the R-Car Gen3 manual, the LVDS mode
must be set before the LVDS I/O pins are enabled, not after -- fix the
Gen3 LVDS startup sequence accordingly.

Fixes: e947eccb ("drm: rcar-du: Add support for LVDS mode selection")
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[Updated comment in rcar_du_lvdsenc_start_gen3()]
[Moved Gen2 startup comment update to separate commit]
[Fixed =| typo]
Tested-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
parent 8525d04b

drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c

+5 −2
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ static void rcar_du_lvdsenc_start_gen3(struct rcar_du_lvdsenc *lvds, 
	u32 lvdcr0;

	u32 pllcr;



	/* PLL clock configuration */

	/* Set the PLL clock configuration and LVDS mode. */

	if (freq < 42000)

		pllcr = LVDPLLCR_PLLDIVCNT_42M;

	else if (freq < 85000)
@@ -107,6 +107,9 @@ static void rcar_du_lvdsenc_start_gen3(struct rcar_du_lvdsenc *lvds, 


	rcar_lvds_write(lvds, LVDPLLCR, pllcr);



	lvdcr0 = lvds->mode << LVDCR0_LVMD_SHIFT;

	rcar_lvds_write(lvds, LVDCR0, lvdcr0);



	/* Turn all the channels on. */

	rcar_lvds_write(lvds, LVDCR1,

			LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) |
@@ -116,7 +119,7 @@ static void rcar_du_lvdsenc_start_gen3(struct rcar_du_lvdsenc *lvds, 
	 * Turn the PLL on, set it to LVDS normal mode, wait for the startup

	 * delay and turn the output on.

	 */

	lvdcr0 = (lvds->mode << LVDCR0_LVMD_SHIFT) | LVDCR0_PLLON;

	lvdcr0 |= LVDCR0_PLLON;

	rcar_lvds_write(lvds, LVDCR0, lvdcr0);



	lvdcr0 |= LVDCR0_PWD;