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Commit 796919c3 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

Merge tag 'for-v4.0-rc/omap-fixes-a' of... 

Merge tag 'for-v4.0-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.0/fixes

ARM: OMAP2+: first set of hwmod and PRCM fixes for v4.0-rc

This series fixes the following bugs:

- a lockdep problem with the OMAP hwmod code;
- incorrect PCIe hwmod data for the DRA7xx chips;
- the clockdomain handling in the hardreset deassertion code,
  preventing idle;
- the use of an IRQ status register rather than an IRQ enable register
  in the OMAP4 PRM code.

Basic build, boot, and PM test results are available here:

http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.0-rc/20150301165949/
parents 2725917f 50f59d07

arch/arm/mach-omap2/omap_hwmod.c

+5 −5
Original line number Diff line number Diff line
@@ -1692,15 +1692,14 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 
	if (ret == -EBUSY)

		pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);



	if (!ret) {

	if (oh->clkdm) {

		/*

		 * Set the clockdomain to HW_AUTO, assuming that the

		 * previous state was HW_AUTO.

		 */

		if (oh->clkdm && hwsup)

		if (hwsup)

			clkdm_allow_idle(oh->clkdm);

	} else {

		if (oh->clkdm)



		clkdm_hwmod_disable(oh->clkdm, oh);

	}
@@ -2698,6 +2697,7 @@ static int __init _register(struct omap_hwmod *oh) 
	INIT_LIST_HEAD(&oh->master_ports);

	INIT_LIST_HEAD(&oh->slave_ports);

	spin_lock_init(&oh->_lock);

	lockdep_set_class(&oh->_lock, &oh->hwmod_key);



	oh->_state = _HWMOD_STATE_REGISTERED;

arch/arm/mach-omap2/omap_hwmod.h

+1 −0
Original line number Diff line number Diff line
@@ -674,6 +674,7 @@ struct omap_hwmod { 
	u32				_sysc_cache;

	void __iomem			*_mpu_rt_va;

	spinlock_t			_lock;

	struct lock_class_key		hwmod_key; /* unique lock class */

	struct list_head		node;

	struct omap_hwmod_ocp_if	*_mpu_port;

	unsigned int			(*xlate_irq)(unsigned int);

arch/arm/mach-omap2/omap_hwmod_7xx_data.c

+24 −79
Original line number Diff line number Diff line
@@ -1466,68 +1466,31 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = { 
 *

 */



static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {

static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {

	.name	= "pcie",

};



/* pcie1 */

static struct omap_hwmod dra7xx_pcie1_hwmod = {

static struct omap_hwmod dra7xx_pciess1_hwmod = {

	.name		= "pcie1",

	.class		= &dra7xx_pcie_hwmod_class,

	.class		= &dra7xx_pciess_hwmod_class,

	.clkdm_name	= "pcie_clkdm",

	.main_clk	= "l4_root_clk_div",

	.prcm = {

		.omap4 = {

			.clkctrl_offs	= DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,

			.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,

			.context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,

			.modulemode   = MODULEMODE_SWCTRL,

		},

	},

};



/* pcie2 */

static struct omap_hwmod dra7xx_pcie2_hwmod = {

static struct omap_hwmod dra7xx_pciess2_hwmod = {

	.name		= "pcie2",

	.class		= &dra7xx_pcie_hwmod_class,

	.class		= &dra7xx_pciess_hwmod_class,

	.clkdm_name	= "pcie_clkdm",

	.main_clk	= "l4_root_clk_div",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,

			.modulemode   = MODULEMODE_SWCTRL,

		},

	},

};



/*

 * 'PCIE PHY' class

 *

 */



static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {

	.name	= "pcie-phy",

};



/* pcie1 phy */

static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {

	.name		= "pcie1-phy",

	.class		= &dra7xx_pcie_phy_hwmod_class,

	.clkdm_name	= "l3init_clkdm",

	.main_clk	= "l4_root_clk_div",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,

			.context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,

			.modulemode   = MODULEMODE_SWCTRL,

		},

	},

};



/* pcie2 phy */

static struct omap_hwmod dra7xx_pcie2_phy_hwmod = {

	.name		= "pcie2-phy",

	.class		= &dra7xx_pcie_phy_hwmod_class,

	.clkdm_name	= "l3init_clkdm",

	.main_clk	= "l4_root_clk_div",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET,
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = { 
	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_1 -> pcie1 */

static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = {

/* l3_main_1 -> pciess1 */

static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {

	.master		= &dra7xx_l3_main_1_hwmod,

	.slave		= &dra7xx_pcie1_hwmod,

	.slave		= &dra7xx_pciess1_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_cfg -> pcie1 */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {

/* l4_cfg -> pciess1 */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {

	.master		= &dra7xx_l4_cfg_hwmod,

	.slave		= &dra7xx_pcie1_hwmod,

	.slave		= &dra7xx_pciess1_hwmod,

	.clk		= "l4_root_clk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_1 -> pcie2 */

static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = {

/* l3_main_1 -> pciess2 */

static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {

	.master		= &dra7xx_l3_main_1_hwmod,

	.slave		= &dra7xx_pcie2_hwmod,

	.slave		= &dra7xx_pciess2_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_cfg -> pcie2 */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {

	.master		= &dra7xx_l4_cfg_hwmod,

	.slave		= &dra7xx_pcie2_hwmod,

	.clk		= "l4_root_clk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_cfg -> pcie1 phy */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {

	.master		= &dra7xx_l4_cfg_hwmod,

	.slave		= &dra7xx_pcie1_phy_hwmod,

	.clk		= "l4_root_clk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_cfg -> pcie2 phy */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {

/* l4_cfg -> pciess2 */

static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {

	.master		= &dra7xx_l4_cfg_hwmod,

	.slave		= &dra7xx_pcie2_phy_hwmod,

	.slave		= &dra7xx_pciess2_hwmod,

	.clk		= "l4_root_clk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { 
	&dra7xx_l4_cfg__mpu,

	&dra7xx_l4_cfg__ocp2scp1,

	&dra7xx_l4_cfg__ocp2scp3,

	&dra7xx_l3_main_1__pcie1,

	&dra7xx_l4_cfg__pcie1,

	&dra7xx_l3_main_1__pcie2,

	&dra7xx_l4_cfg__pcie2,

	&dra7xx_l4_cfg__pcie1_phy,

	&dra7xx_l4_cfg__pcie2_phy,

	&dra7xx_l3_main_1__pciess1,

	&dra7xx_l4_cfg__pciess1,

	&dra7xx_l3_main_1__pciess2,

	&dra7xx_l4_cfg__pciess2,

	&dra7xx_l3_main_1__qspi,

	&dra7xx_l4_per3__rtcss,

	&dra7xx_l4_cfg__sata,

arch/arm/mach-omap2/prm44xx.c

+2 −2
Original line number Diff line number Diff line
@@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) 
{

	saved_mask[0] =

		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,

					OMAP4_PRM_IRQSTATUS_MPU_OFFSET);

					OMAP4_PRM_IRQENABLE_MPU_OFFSET);

	saved_mask[1] =

		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,

					OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);

					OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);



	omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,

				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);