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Commit 792474b7 authored by Vitaly Prosyak's avatar Vitaly Prosyak Committed by Alex Deucher
Browse files

drm/amd/display: De PQ implementation 



Some refactoring and optimizations in color module.
Added de gamma 2.2 & 2.4, also re gamma 2.2.
Added interface for diagnostic for de gamma & de pq.

Signed-off-by: default avatarVitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: default avatarKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 627c9a0a

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

+28 −2
Original line number Original line Diff line number Diff line
@@ -298,6 +298,32 @@ static void dpp1_cm_get_reg_field( 
	reg->masks.exp_resion_start_segment = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B;

	reg->masks.exp_resion_start_segment = dpp->tf_mask->CM_RGAM_RAMB_EXP_REGION_START_SEGMENT_B;

}

}





static void dpp1_cm_get_degamma_reg_field(

		struct dcn10_dpp *dpp,

		struct xfer_func_reg *reg)

{

	reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET;

	reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET;

	reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;

	reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;

	reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET;

	reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET;

	reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS;

	reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS;



	reg->shifts.field_region_end = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_END_B;

	reg->masks.field_region_end = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_B;

	reg->shifts.field_region_end_slope = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B;

	reg->masks.field_region_end_slope = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B;

	reg->shifts.field_region_end_base = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_END_BASE_B;

	reg->masks.field_region_end_base = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_END_BASE_B;

	reg->shifts.field_region_linear_slope = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B;

	reg->masks.field_region_linear_slope = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B;

	reg->shifts.exp_region_start = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_START_B;

	reg->masks.exp_region_start = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_START_B;

	reg->shifts.exp_resion_start_segment = dpp->tf_shift->CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B;

	reg->masks.exp_resion_start_segment = dpp->tf_mask->CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B;

}

void dpp1_cm_set_output_csc_adjustment(

void dpp1_cm_set_output_csc_adjustment(

		struct dpp *dpp_base,

		struct dpp *dpp_base,

		const uint16_t *regval)

		const uint16_t *regval)
@@ -502,7 +528,7 @@ void dpp1_program_degamma_lutb_settings( 
	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

	struct xfer_func_reg gam_regs;

	struct xfer_func_reg gam_regs;





	dpp1_cm_get_reg_field(dpp, &gam_regs);

	dpp1_cm_get_degamma_reg_field(dpp, &gam_regs);





	gam_regs.start_cntl_b = REG(CM_DGAM_RAMB_START_CNTL_B);

	gam_regs.start_cntl_b = REG(CM_DGAM_RAMB_START_CNTL_B);

	gam_regs.start_cntl_g = REG(CM_DGAM_RAMB_START_CNTL_G);

	gam_regs.start_cntl_g = REG(CM_DGAM_RAMB_START_CNTL_G);
@@ -531,7 +557,7 @@ void dpp1_program_degamma_luta_settings( 
	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

	struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

	struct xfer_func_reg gam_regs;

	struct xfer_func_reg gam_regs;





	dpp1_cm_get_reg_field(dpp, &gam_regs);

	dpp1_cm_get_degamma_reg_field(dpp, &gam_regs);





	gam_regs.start_cntl_b = REG(CM_DGAM_RAMA_START_CNTL_B);

	gam_regs.start_cntl_b = REG(CM_DGAM_RAMA_START_CNTL_B);

	gam_regs.start_cntl_g = REG(CM_DGAM_RAMA_START_CNTL_G);

	gam_regs.start_cntl_g = REG(CM_DGAM_RAMA_START_CNTL_G);

drivers/gpu/drm/amd/display/modules/color/color_gamma.c

+406 −73

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/modules/color/color_gamma.h

+8 −0
Original line number Original line Diff line number Diff line
@@ -34,12 +34,20 @@ enum dc_transfer_func_predefined; 




void setup_x_points_distribution(void);

void setup_x_points_distribution(void);

void precompute_pq(void);

void precompute_pq(void);

void precompute_de_pq(void);





bool mod_color_calculate_regamma_params(struct dc_transfer_func *output_tf,

bool mod_color_calculate_regamma_params(struct dc_transfer_func *output_tf,

		const struct dc_gamma *ramp, bool mapUserRamp);

		const struct dc_gamma *ramp, bool mapUserRamp);





bool mod_color_calculate_degamma_params(struct dc_transfer_func *output_tf,

		const struct dc_gamma *ramp, bool mapUserRamp);



bool mod_color_calculate_curve(enum dc_transfer_func_predefined  trans,

bool mod_color_calculate_curve(enum dc_transfer_func_predefined  trans,

		struct dc_transfer_func_distributed_points *points);

		struct dc_transfer_func_distributed_points *points);





bool  mod_color_calculate_degamma_curve(enum dc_transfer_func_predefined trans,

				struct dc_transfer_func_distributed_points *points);









#endif /* COLOR_MOD_COLOR_GAMMA_H_ */
 
#endif /* COLOR_MOD_COLOR_GAMMA_H_ */