Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 78eb2f0c authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: remove keeping the addr of the VM PDs



No more double house keeping.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8f19cd78
Loading
Loading
Loading
Loading
+4 −9
Original line number Original line Diff line number Diff line
@@ -383,7 +383,6 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
			spin_lock(&vm->status_lock);
			spin_lock(&vm->status_lock);
			list_add(&entry->base.vm_status, &vm->relocated);
			list_add(&entry->base.vm_status, &vm->relocated);
			spin_unlock(&vm->status_lock);
			spin_unlock(&vm->status_lock);
			entry->addr = 0;
		}
		}


		if (level < adev->vm_manager.num_level) {
		if (level < adev->vm_manager.num_level) {
@@ -1125,15 +1124,12 @@ static int amdgpu_vm_update_pde(struct amdgpu_device *adev,
	pt = amdgpu_bo_gpu_offset(bo);
	pt = amdgpu_bo_gpu_offset(bo);
	pt = amdgpu_gart_get_vm_pde(adev, pt);
	pt = amdgpu_gart_get_vm_pde(adev, pt);
	/* Don't update huge pages here */
	/* Don't update huge pages here */
	if (entry->addr & AMDGPU_PDE_PTE ||
	if (entry->huge) {
	    entry->addr == (pt | AMDGPU_PTE_VALID)) {
		if (!vm->use_cpu_for_update)
		if (!vm->use_cpu_for_update)
			amdgpu_job_free(job);
			amdgpu_job_free(job);
		return 0;
		return 0;
	}
	}


	entry->addr = pt | AMDGPU_PTE_VALID;

	if (shadow) {
	if (shadow) {
		pde = shadow_addr + (entry - parent->entries) * 8;
		pde = shadow_addr + (entry - parent->entries) * 8;
		params.func(&params, pde, pt, 1, 0, AMDGPU_PTE_VALID);
		params.func(&params, pde, pt, 1, 0, AMDGPU_PTE_VALID);
@@ -1199,7 +1195,6 @@ static void amdgpu_vm_invalidate_level(struct amdgpu_device *adev,
		if (!entry->base.bo)
		if (!entry->base.bo)
			continue;
			continue;


		entry->addr = ~0ULL;
		spin_lock(&vm->status_lock);
		spin_lock(&vm->status_lock);
		if (list_empty(&entry->base.vm_status))
		if (list_empty(&entry->base.vm_status))
			list_add(&entry->base.vm_status, &vm->relocated);
			list_add(&entry->base.vm_status, &vm->relocated);
@@ -1332,10 +1327,10 @@ static void amdgpu_vm_handle_huge_pages(struct amdgpu_pte_update_params *p,
		flags |= AMDGPU_PDE_PTE;
		flags |= AMDGPU_PDE_PTE;
	}
	}


	if (entry->addr == (dst | flags))
	if (!entry->huge && !(flags & AMDGPU_PDE_PTE))
		return;
		return;


	entry->addr = (dst | flags);
	entry->huge = !!(flags & AMDGPU_PDE_PTE);


	if (use_cpu_update) {
	if (use_cpu_update) {
		/* In case a huge page is replaced with a system
		/* In case a huge page is replaced with a system
@@ -1409,7 +1404,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
		amdgpu_vm_handle_huge_pages(params, entry, parent,
		amdgpu_vm_handle_huge_pages(params, entry, parent,
					    nptes, dst, flags);
					    nptes, dst, flags);
		/* We don't need to update PTEs for huge pages */
		/* We don't need to update PTEs for huge pages */
		if (entry->addr & AMDGPU_PDE_PTE)
		if (entry->huge)
			continue;
			continue;


		pt = entry->base.bo;
		pt = entry->base.bo;
+1 −1
Original line number Original line Diff line number Diff line
@@ -138,7 +138,7 @@ struct amdgpu_vm_bo_base {


struct amdgpu_vm_pt {
struct amdgpu_vm_pt {
	struct amdgpu_vm_bo_base	base;
	struct amdgpu_vm_bo_base	base;
	uint64_t			addr;
	bool				huge;


	/* array of page tables, one for each directory entry */
	/* array of page tables, one for each directory entry */
	struct amdgpu_vm_pt		*entries;
	struct amdgpu_vm_pt		*entries;