Commit 78d504bc authored Apr 02, 2015 by Kan Liang Committed by Ingo Molnar Apr 17, 2015

perf/x86/intel: Add Broadwell support for the LBR callstack



Same as Haswell, Broadwell also support the LBR callstack.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Andi Kleen <ak@linux.intel.com>
Link: http://lkml.kernel.org/r/1427962377-40955-1-git-send-email-kan.liang@intel.com


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent 64552396

arch/x86/kernel/cpu/perf_event_intel.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -3275,7 +3275,7 @@ __init int intel_pmu_init(void)
		hw_cache_extra_regs[C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = HSW_DEMAND_WRITE\|
		BDW_L3_MISS_LOCAL\|HSW_SNOOP_DRAM;

		intel_pmu_lbr_init_snb();
		intel_pmu_lbr_init_hsw();

		x86_pmu.event_constraints = intel_bdw_event_constraints;
		x86_pmu.pebs_constraints = intel_hsw_pebs_event_constraints;