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Commit 7862f42d authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.19-q.70 (544e5516) into msm-4.19"

parents c555fe48 578db483

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 19

SUBLEVEL = 69

SUBLEVEL = 70

EXTRAVERSION =

NAME = "People's Front"

arch/arm64/kernel/cpufeature.c

+11 −3
Original line number Diff line number Diff line
@@ -170,9 +170,17 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = { 
};



static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {

	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI),

	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI),

	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI),

	/*

	 * We already refuse to boot CPUs that don't support our configured

	 * page size, so we can only detect mismatches for a page size other

	 * than the one we're currently using. Unfortunately, SoCs like this

	 * exist in the wild so, even though we don't like it, we'll have to go

	 * along with it and treat them as non-strict.

	 */

	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI),

	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI),

	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI),



	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_BIGENDEL0_SHIFT, 4, 0),

	/* Linux shouldn't care about secure memory */

	ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_SNSMEM_SHIFT, 4, 0),

arch/powerpc/kvm/book3s_64_vio.c

+4 −2
Original line number Diff line number Diff line
@@ -602,8 +602,10 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu, 


		if (kvmppc_gpa_to_ua(vcpu->kvm,

				tce & ~(TCE_PCI_READ | TCE_PCI_WRITE),

				&ua, NULL))

			return H_PARAMETER;

				&ua, NULL)) {

			ret = H_PARAMETER;

			goto unlock_exit;

		}



		list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {

			ret = kvmppc_tce_iommu_map(vcpu->kvm, stt,

arch/powerpc/kvm/book3s_64_vio_hv.c

+4 −2
Original line number Diff line number Diff line
@@ -528,8 +528,10 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu, 
		ua = 0;

		if (kvmppc_gpa_to_ua(vcpu->kvm,

				tce & ~(TCE_PCI_READ | TCE_PCI_WRITE),

				&ua, NULL))

			return H_PARAMETER;

				&ua, NULL)) {

			ret = H_PARAMETER;

			goto unlock_exit;

		}



		list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {

			ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt,

arch/x86/kernel/apic/apic.c

+4 −0
Original line number Diff line number Diff line
@@ -1140,6 +1140,10 @@ void clear_local_APIC(void) 
	apic_write(APIC_LVT0, v | APIC_LVT_MASKED);

	v = apic_read(APIC_LVT1);

	apic_write(APIC_LVT1, v | APIC_LVT_MASKED);

	if (!x2apic_enabled()) {

		v = apic_read(APIC_LDR) & ~APIC_LDR_MASK;

		apic_write(APIC_LDR, v);

	}

	if (maxlvt >= 4) {

		v = apic_read(APIC_LVTPC);

		apic_write(APIC_LVTPC, v | APIC_LVT_MASKED);