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Commit 77bd2f6f authored by Yangbo Lu's avatar Yangbo Lu Committed by Ulf Hansson
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mmc: sdhci-of-esdhc: add workaround for pre divider initial value 



For eSDHC(version < 2.3), the pre divider only could divide base clock
by 2 at least. Add workaround for this to avoid unexpected issue.

Signed-off-by: default avatarYangbo Lu <yangbo.lu@freescale.com>
Acked-by: default avatarJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
Fixes: bd455029 ("mmc: sdhci-of-esdhc: Pre divider starts at 1")
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent d31911b9

drivers/mmc/host/sdhci-of-esdhc.c

+6 −0
Original line number Diff line number Diff line
@@ -208,6 +208,12 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) 
	if (clock == 0)

		return;



	/* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */

	temp = esdhc_readw(host, SDHCI_HOST_VERSION);

	temp = (temp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;

	if (temp < VENDOR_V_23)

		pre_div = 2;



	/* Workaround to reduce the clock frequency for p1010 esdhc */

	if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {

		if (clock > 20000000)