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Commit 77affa31 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/psr: Fix compiler warnings for hsw_psr_disable() 



drivers/gpu/drm/i915/intel_psr.c:634 hsw_psr_disable() warn: if statement not indented
drivers/gpu/drm/i915/intel_psr.c:644 hsw_psr_disable() warn: if statement not indented

Fixes: 3fcb0ca1 ("drm/i915/psr: fix blank screen issue for psr2")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Cc: Patil Deepti <deepti.patil@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170116130622.20369-2-chris@chris-wilson.co.uk


Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent b86bef20

drivers/gpu/drm/i915/intel_psr.c

+22 −20
Original line number Diff line number Diff line
@@ -620,34 +620,36 @@ static void hsw_psr_disable(struct intel_dp *intel_dp) 
	struct drm_i915_private *dev_priv = to_i915(dev);



	if (dev_priv->psr.active) {

		i915_reg_t psr_ctl;

		u32 psr_status_mask;



		if (dev_priv->psr.aux_frame_sync)

			drm_dp_dpcd_writeb(&intel_dp->aux,

					DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,

					0);



		if (dev_priv->psr.psr2_support) {

			I915_WRITE(EDP_PSR2_CTL,

				I915_READ(EDP_PSR2_CTL) &

					~(EDP_PSR2_ENABLE |

					EDP_SU_TRACK_ENABLE));

			/* Wait till PSR2 is idle */

			if (intel_wait_for_register(dev_priv,

						    EDP_PSR2_STATUS_CTL,

						    EDP_PSR2_STATUS_STATE_MASK,

						    0,

						    2000))

			DRM_ERROR("Timed out waiting for PSR2 Idle State\n");

			psr_ctl = EDP_PSR2_CTL;

			psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;



			I915_WRITE(psr_ctl,

				   I915_READ(psr_ctl) &

				   ~(EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE));



		} else {

			I915_WRITE(EDP_PSR_CTL,

				   I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);

			/* Wait till PSR1 is idle */

			psr_ctl = EDP_PSR_STATUS_CTL;

			psr_status_mask = EDP_PSR_STATUS_STATE_MASK;



			I915_WRITE(psr_ctl,

				   I915_READ(psr_ctl) & ~EDP_PSR_ENABLE);

		}



		/* Wait till PSR is idle */

		if (intel_wait_for_register(dev_priv,

						    EDP_PSR_STATUS_CTL,

						    EDP_PSR_STATUS_STATE_MASK,

						    0,

					    psr_ctl, psr_status_mask, 0,

					    2000))

			DRM_ERROR("Timed out waiting for PSR Idle State\n");

		}



		dev_priv->psr.active = false;

	} else {

		if (dev_priv->psr.psr2_support)