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Commit 77977d95 authored by Hareesh Gundu's avatar Hareesh Gundu Committed by Deepak Kumar
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msm: kgsl: Update hardware clock gating settings for A612 



Update A612 hardware clock gating settings to fix vulkan
shader preload perf regression issue.

Change-Id: I0ac271089aac9744a869645eb9f4867ffd1dc134
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent fb50b6d0

drivers/gpu/msm/adreno-gpulist.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -1280,8 +1280,8 @@ static const struct adreno_a6xx_core adreno_gpu_core_a680 = { 
static const struct adreno_reglist a612_hwcg_regs[] = {

static const struct adreno_reglist a612_hwcg_regs[] = {

	{A6XX_RBBM_CLOCK_CNTL_SP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL_SP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},

	{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},

	{A6XX_RBBM_CLOCK_DELAY_SP0, 0x0000F3CF},

	{A6XX_RBBM_CLOCK_DELAY_SP0, 0x00000081},

	{A6XX_RBBM_CLOCK_HYST_SP0, 0x00000081},

	{A6XX_RBBM_CLOCK_HYST_SP0, 0x0000F3CF},

	{A6XX_RBBM_CLOCK_CNTL_TP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL_TP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL2_TP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL2_TP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL3_TP0, 0x22222222},

	{A6XX_RBBM_CLOCK_CNTL3_TP0, 0x22222222},