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Commit 76cb2c61 authored by Yan, Zheng's avatar Yan, Zheng Committed by Ingo Molnar
Browse files

perf/x86/intel: Save/restore LBR stack during context switch 



When the LBR call stack is enabled, it is necessary to save/restore
the LBR stack on context switch. The solution is saving/restoring
the LBR stack to/from task's perf event context.

The LBR stack is saved/restored only when there are events that use
the LBR call stack. If no event uses LBR call stack, the LBR stack
is reset when task is scheduled in.

Signed-off-by: default avatarYan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: default avatarKan Liang <kan.liang@intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: eranian@google.com
Cc: jolsa@redhat.com
Link: http://lkml.kernel.org/r/1415156173-10035-10-git-send-email-kan.liang@intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 63f0c1d8

arch/x86/kernel/cpu/perf_event_intel_lbr.c

+76 −12
Original line number Diff line number Diff line
@@ -180,13 +180,89 @@ void intel_pmu_lbr_reset(void) 
		intel_pmu_lbr_reset_64();

}



/*

 * TOS = most recently recorded branch

 */

static inline u64 intel_pmu_lbr_tos(void)

{

	u64 tos;



	rdmsrl(x86_pmu.lbr_tos, tos);

	return tos;

}



enum {

	LBR_NONE,

	LBR_VALID,

};



static void __intel_pmu_lbr_restore(struct x86_perf_task_context *task_ctx)

{

	int i;

	unsigned lbr_idx, mask;

	u64 tos;



	if (task_ctx->lbr_callstack_users == 0 ||

	    task_ctx->lbr_stack_state == LBR_NONE) {

		intel_pmu_lbr_reset();

		return;

	}



	mask = x86_pmu.lbr_nr - 1;

	tos = intel_pmu_lbr_tos();

	for (i = 0; i < x86_pmu.lbr_nr; i++) {

		lbr_idx = (tos - i) & mask;

		wrmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);

		wrmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);

	}

	task_ctx->lbr_stack_state = LBR_NONE;

}



static void __intel_pmu_lbr_save(struct x86_perf_task_context *task_ctx)

{

	int i;

	unsigned lbr_idx, mask;

	u64 tos;



	if (task_ctx->lbr_callstack_users == 0) {

		task_ctx->lbr_stack_state = LBR_NONE;

		return;

	}



	mask = x86_pmu.lbr_nr - 1;

	tos = intel_pmu_lbr_tos();

	for (i = 0; i < x86_pmu.lbr_nr; i++) {

		lbr_idx = (tos - i) & mask;

		rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);

		rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);

	}

	task_ctx->lbr_stack_state = LBR_VALID;

}



void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in)

{

	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);

	struct x86_perf_task_context *task_ctx;



	if (!x86_pmu.lbr_nr)

		return;



	/*

	 * If LBR callstack feature is enabled and the stack was saved when

	 * the task was scheduled out, restore the stack. Otherwise flush

	 * the LBR stack.

	 */

	task_ctx = ctx ? ctx->task_ctx_data : NULL;

	if (task_ctx) {

		if (sched_in) {

			__intel_pmu_lbr_restore(task_ctx);

			cpuc->lbr_context = ctx;

		} else {

			__intel_pmu_lbr_save(task_ctx);

		}

		return;

	}



	/*

	 * When sampling the branck stack in system-wide, it may be

	 * necessary to flush the stack on context switch. This happens
@@ -279,18 +355,6 @@ void intel_pmu_lbr_disable_all(void) 
		__intel_pmu_lbr_disable();

}



/*

 * TOS = most recently recorded branch

 */

static inline u64 intel_pmu_lbr_tos(void)

{

	u64 tos;



	rdmsrl(x86_pmu.lbr_tos, tos);



	return tos;

}



static void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)

{

	unsigned long mask = x86_pmu.lbr_nr - 1;