Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 76bf0db5 authored by Christian König's avatar Christian König Committed by Daniel Vetter
Browse files

dma-buf/fence: make fence context 64 bit v2



Fence contexts are created on the fly (for example) by the GPU scheduler used
in the amdgpu driver as a result of an userspace request. Because of this
userspace could in theory force a wrap around of the 32bit context number
if it doesn't behave well.

Avoid this by increasing the context number to 64bits. This way even when
userspace manages to allocate a billion contexts per second it takes more
than 500 years for the context number to wrap around.

v2: fix printf formats as well.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarGustavo Padovan <gustavo.padovan@collabora.co.uk>
Acked-by: default avatarSumit Semwal <sumit.semwal@linaro.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1464786612-5010-2-git-send-email-deathsimple@vodafone.de
parent 33779007
Loading
Loading
Loading
Loading
+4 −4
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ EXPORT_TRACEPOINT_SYMBOL(fence_emit);
 * context or not. One device can have multiple separate contexts,
 * and they're used if some engine can run independently of another.
 */
static atomic_t fence_context_counter = ATOMIC_INIT(0);
static atomic64_t fence_context_counter = ATOMIC64_INIT(0);

/**
 * fence_context_alloc - allocate an array of fence contexts
@@ -44,10 +44,10 @@ static atomic_t fence_context_counter = ATOMIC_INIT(0);
 * This function will return the first index of the number of fences allocated.
 * The fence context is used for setting fence->context to a unique number.
 */
unsigned fence_context_alloc(unsigned num)
u64 fence_context_alloc(unsigned num)
{
	BUG_ON(!num);
	return atomic_add_return(num, &fence_context_counter) - num;
	return atomic64_add_return(num, &fence_context_counter) - num;
}
EXPORT_SYMBOL(fence_context_alloc);

@@ -513,7 +513,7 @@ EXPORT_SYMBOL(fence_wait_any_timeout);
 */
void
fence_init(struct fence *fence, const struct fence_ops *ops,
	     spinlock_t *lock, unsigned context, unsigned seqno)
	     spinlock_t *lock, u64 context, unsigned seqno)
{
	BUG_ON(!lock);
	BUG_ON(!ops || !ops->wait || !ops->enable_signaling ||
+1 −1
Original line number Diff line number Diff line
@@ -2032,7 +2032,7 @@ struct amdgpu_device {
	struct amdgpu_irq_src		hpd_irq;

	/* rings */
	unsigned			fence_context;
	u64				fence_context;
	unsigned			num_rings;
	struct amdgpu_ring		*rings[AMDGPU_MAX_RINGS];
	bool				ib_pool_ready;
+1 −1
Original line number Diff line number Diff line
@@ -427,7 +427,7 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
			   soffset, eoffset, eoffset - soffset);

		if (i->fence)
			seq_printf(m, " protected by 0x%08x on context %d",
			seq_printf(m, " protected by 0x%08x on context %llu",
				   i->fence->seqno, i->fence->context);

		seq_printf(m, "\n");
+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ struct etnaviv_gpu {
	u32 completed_fence;
	u32 retired_fence;
	wait_queue_head_t fence_event;
	unsigned int fence_context;
	u64 fence_context;
	spinlock_t fence_spinlock;

	/* worker for handling active-list retiring: */
+2 −1
Original line number Diff line number Diff line
@@ -57,7 +57,8 @@ struct nouveau_fence_priv {
	int  (*context_new)(struct nouveau_channel *);
	void (*context_del)(struct nouveau_channel *);

	u32 contexts, context_base;
	u32 contexts;
	u64 context_base;
	bool uevent;
};

Loading