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Commit 756515c6 authored by Philip Rakity's avatar Philip Rakity Committed by Chris Ball
Browse files

mmc: sdhci-pxa: add platform code for UHS signaling 



Marvell controller requires 1.8V bit in UHS control register 2
be set when doing UHS.  eMMC does not require 1.8V for DDR.
add platform code to handle this.

Signed-off-by: default avatarPhilip Rakity <prakity@marvell.com>
Reviewed-by: default avatarArindam Nath <arindam.nath@amd.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 6322cdd0

drivers/mmc/host/sdhci-pxa.c

+41 −0
Original line number Diff line number Diff line
@@ -69,7 +69,45 @@ static void set_clock(struct sdhci_host *host, unsigned int clock) 
	}

}



static int set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)

{

	u16 ctrl_2;



	/*

	 * Set V18_EN -- UHS modes do not work without this.

	 * does not change signaling voltage

	 */

	ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);



	/* Select Bus Speed Mode for host */

	ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;

	switch (uhs) {

	case MMC_TIMING_UHS_SDR12:

		ctrl_2 |= SDHCI_CTRL_UHS_SDR12;

		break;

	case MMC_TIMING_UHS_SDR25:

		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;

		break;

	case MMC_TIMING_UHS_SDR50:

		ctrl_2 |= SDHCI_CTRL_UHS_SDR50 | SDHCI_CTRL_VDD_180;

		break;

	case MMC_TIMING_UHS_SDR104:

		ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180;

		break;

	case MMC_TIMING_UHS_DDR50:

		ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180;

		break;

	}



	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);

	pr_debug("%s:%s uhs = %d, ctrl_2 = %04X\n",

		__func__, mmc_hostname(host->mmc), uhs, ctrl_2);



	return 0;

}



static struct sdhci_ops sdhci_pxa_ops = {

	.set_uhs_signaling = set_uhs_signaling,

	.set_clock = set_clock,

};
@@ -141,6 +179,9 @@ static int __devinit sdhci_pxa_probe(struct platform_device *pdev) 
	if (pdata->quirks)

		host->quirks |= pdata->quirks;



	/* enable 1/8V DDR capable */

	host->mmc->caps |= MMC_CAP_1_8V_DDR;



	/* If slot design supports 8 bit data, indicate this to MMC. */

	if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT)

		host->mmc->caps |= MMC_CAP_8_BIT_DATA;