Merge "ARM: dts: qcom: Add ICE support for UFS card"

		status = "disabled";

	};

	ufscard_ice: ufscardice@1db0000 {

		compatible = "qcom,ice";

		reg = <0x1db0000 0x8000>;

		qcom,enable-ice-clk;

		clock-names = "ufs_core_clk", "bus_clk",

				"iface_clk", "ice_core_clk";

		clocks = <&clock_gcc GCC_UFS_CARD_AXI_HW_CTL_CLK>,

			<&clock_gcc GCC_UFS_1X_CLKREF_EN>,

			<&clock_gcc GCC_UFS_CARD_AHB_CLK>,

			<&clock_gcc GCC_UFS_CARD_ICE_CORE_CLK>;

		qcom,op-freq-hz = <0>, <0>, <0>, <300000000>;

		vdd-hba-supply = <&ufs_card_gdsc>;

		qcom,msm-bus,name = "ufs_card_ice_noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<1 650 0 0>,    /* No vote */

				<1 650 1000 0>; /* Max. bandwidth */

		qcom,bus-vector-names = "MIN",

					"MAX";

		qcom,instance-type = "ufscard";

	};

	ufsphy_card: ufsphy_card@1da7000 {

		reg = <0x1da7000 0xe00>; /* PHY regs */

		reg-names = "phy_mem";

		#phy-cells = <0>;

		ufs-qcom-crypto = <&ufscard_ice>;

		lanes-per-direction = <1>;

		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&ufsphy_card>;

		phy-names = "ufsphy";

		ufs-qcom-crypto = <&ufscard_ice>;

		lanes-per-direction = <1>;

		dev-ref-clk-freq = <0>; /* 19.2 MHz */