Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 72e4b2cd authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/time: refactor MFTB() to limit number of ifdefs 



The 8xx cannot access the TBL and TBU registers using mfspr/mtspr
It must be accessed using mftb/mftbu

Due to this, there is a number of places with #ifdef CONFIG_8xx

This patch defines new macros MFTBL(x) and MFTBU(x) on the same model
as MFTB(x) and tries to make use of them as much as possible.

In arch/powerpc/include/asm/timex.h, we also remove the ifdef
for the asm() operands as the compiler doesn't mind unused operands

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent de41ef6e

arch/powerpc/boot/ppc_asm.h

+8 −0
Original line number Diff line number Diff line
@@ -80,4 +80,12 @@ 
	.long 0xa6037b7d; /* mtsrr1 r11				*/ \

	.long 0x2400004c  /* rfid				*/



#ifdef CONFIG_PPC_8xx

#define MFTBL(dest)			mftb dest

#define MFTBU(dest)			mftbu dest

#else

#define MFTBL(dest)			mfspr dest, SPRN_TBRL

#define MFTBU(dest)			mfspr dest, SPRN_TBRU

#endif



#endif /* _PPC64_PPC_ASM_H */

arch/powerpc/boot/util.S

+5 −19
Original line number Diff line number Diff line
@@ -71,32 +71,18 @@ udelay: 
	add	r4,r4,r5

	addi	r4,r4,-1

	divw	r4,r4,r5	/* BUS ticks */

#ifdef CONFIG_8xx

1:	mftbu	r5

	mftb	r6

	mftbu	r7

#else

1:	mfspr	r5, SPRN_TBRU

	mfspr	r6, SPRN_TBRL

	mfspr	r7, SPRN_TBRU

#endif

1:	MFTBU(r5)

	MFTBL(r6)

	MFTBU(r7)

	cmpw	0,r5,r7

	bne	1b		/* Get [synced] base time */

	addc	r9,r6,r4	/* Compute end time */

	addze	r8,r5

#ifdef CONFIG_8xx

2:	mftbu	r5

#else

2:	mfspr	r5, SPRN_TBRU

#endif

2:	MFTBU(r5)

	cmpw	0,r5,r8

	blt	2b

	bgt	3f

#ifdef CONFIG_8xx

	mftb	r6

#else

	mfspr	r6, SPRN_TBRL

#endif

	MFTBL(r6)

	cmpw	0,r6,r9

	blt	2b

3:	blr

arch/powerpc/include/asm/ppc_asm.h

+9 −3
Original line number Diff line number Diff line
@@ -378,10 +378,16 @@ BEGIN_FTR_SECTION_NESTED(96); \ 
	cmpwi dest,0;			\

	beq-  90b;			\

END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)

#elif defined(CONFIG_8xx)

#define MFTB(dest)			mftb dest

#else

#define MFTB(dest)			mfspr dest, SPRN_TBRL

#define MFTB(dest)			MFTBL(dest)

#endif



#ifdef CONFIG_PPC_8xx

#define MFTBL(dest)			mftb dest

#define MFTBU(dest)			mftbu dest

#else

#define MFTBL(dest)			mfspr dest, SPRN_TBRL

#define MFTBU(dest)			mfspr dest, SPRN_TBRU

#endif



#ifndef CONFIG_SMP

arch/powerpc/include/asm/timex.h

+0 −4
Original line number Diff line number Diff line
@@ -45,11 +45,7 @@ static inline cycles_t get_cycles(void) 
		"	.long 0\n"

		"	.long 0\n"

		".previous"

#ifdef CONFIG_8xx

		: "=r" (ret) : "i" (CPU_FTR_601));

#else

		: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));

#endif

	return ret;

#endif

}

arch/powerpc/kernel/vdso32/gettimeofday.S

+3 −9
Original line number Diff line number Diff line
@@ -232,15 +232,9 @@ __do_get_tspec: 
	lwz	r6,(CFG_TB_ORIG_STAMP+4)(r9)



	/* Get a stable TB value */

#ifdef CONFIG_8xx

2:	mftbu	r3

	mftbl	r4

	mftbu	r0

#else

2:	mfspr	r3, SPRN_TBRU

	mfspr	r4, SPRN_TBRL

	mfspr	r0, SPRN_TBRU

#endif

2:	MFTBU(r3)

	MFTBL(r4)

	MFTBU(r0)

	cmplw	cr0,r3,r0

	bne-	2b