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Commit 72a57438 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: consolidate atom scratch reg handling for hangs



Move from asic specific code to common atom code.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a76ed485
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+13 −0
Original line number Diff line number Diff line
@@ -1784,6 +1784,19 @@ void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
		WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]);
}

void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
					      bool hung)
{
	u32 tmp = RREG32(mmBIOS_SCRATCH_3);

	if (hung)
		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
	else
		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;

	WREG32(mmBIOS_SCRATCH_3, tmp);
}

/* Atom needs data in little endian format
 * so swap as appropriate when copying data to
 * or from atom. Note that atom operates on
+2 −0
Original line number Diff line number Diff line
@@ -206,6 +206,8 @@ void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock);
void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev);
void amdgpu_atombios_scratch_regs_save(struct amdgpu_device *adev);
void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev);
void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
					      bool hung);

void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
int amdgpu_atombios_get_max_vddc(struct amdgpu_device *adev, u8 voltage_type,
+3 −14
Original line number Diff line number Diff line
@@ -1189,18 +1189,6 @@ static int cik_gpu_pci_config_reset(struct amdgpu_device *adev)
	return r;
}

static void cik_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hung)
{
	u32 tmp = RREG32(mmBIOS_SCRATCH_3);

	if (hung)
		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
	else
		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;

	WREG32(mmBIOS_SCRATCH_3, tmp);
}

/**
 * cik_asic_reset - soft reset GPU
 *
@@ -1213,11 +1201,12 @@ static void cik_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hu
static int cik_asic_reset(struct amdgpu_device *adev)
{
	int r;
	cik_set_bios_scratch_engine_hung(adev, true);

	amdgpu_atombios_scratch_regs_engine_hung(adev, true);

	r = cik_gpu_pci_config_reset(adev);

	cik_set_bios_scratch_engine_hung(adev, false);
	amdgpu_atombios_scratch_regs_engine_hung(adev, false);

	return r;
}
+2 −14
Original line number Diff line number Diff line
@@ -729,18 +729,6 @@ static int vi_gpu_pci_config_reset(struct amdgpu_device *adev)
	return -EINVAL;
}

static void vi_set_bios_scratch_engine_hung(struct amdgpu_device *adev, bool hung)
{
	u32 tmp = RREG32(mmBIOS_SCRATCH_3);

	if (hung)
		tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG;
	else
		tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG;

	WREG32(mmBIOS_SCRATCH_3, tmp);
}

/**
 * vi_asic_reset - soft reset GPU
 *
@@ -754,11 +742,11 @@ static int vi_asic_reset(struct amdgpu_device *adev)
{
	int r;

	vi_set_bios_scratch_engine_hung(adev, true);
	amdgpu_atombios_scratch_regs_engine_hung(adev, true);

	r = vi_gpu_pci_config_reset(adev);

	vi_set_bios_scratch_engine_hung(adev, false);
	amdgpu_atombios_scratch_regs_engine_hung(adev, false);

	return r;
}