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Commit 725a8fe3 authored by Jon Hunter's avatar Jon Hunter
Browse files

ARM: OMAP3: Correct HWMOD DMTIMER SYSC register declarations



Currently, the OMAP3 HWMOD data defines two TIOCP_CFG register structures
(referred to as the SYSC register in the HWMOD data) where timers 1, 2 and 10
use one of the defintions and the other timers use the other definition. For
OMAP3 devices the structure of the DMTIMER TIOCP_CFG register is the same for
all 12 instances of the DMTIMER. Please note that this is a difference between
OMAP3 and OMAP4 and could be the source of the confusion.

For OMAP3 devices, the DMTIMER TIOCP_CFG register has the fields,
clock-activity, emufree, idlemode, enwakeup, softreset and autoidle for all
12 timers. Therefore, remove one of the SYSC register definitions for the
DMTIMERs and ensure the appropriate register fields are defined for all
DMTIMERs.

Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 7b44cf2c
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+6 −21
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = {
};

/* timer class */
static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
	.rev_offs	= 0x0000,
	.sysc_offs	= 0x0010,
	.syss_offs	= 0x0014,
@@ -164,21 +164,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
	.sysc_fields	= &omap_hwmod_sysc_type1,
};

static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
	.name = "timer",
	.sysc = &omap3xxx_timer_1ms_sysc,
};

static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
	.rev_offs	= 0x0000,
	.sysc_offs	= 0x0010,
	.syss_offs	= 0x0014,
	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
			   SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
	.sysc_fields	= &omap_hwmod_sysc_type1,
};

static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
	.name = "timer",
	.sysc = &omap3xxx_timer_sysc,
@@ -224,7 +209,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
		},
	},
	.dev_attr	= &capability_alwon_dev_attr,
	.class		= &omap3xxx_timer_1ms_hwmod_class,
	.class		= &omap3xxx_timer_hwmod_class,
};

/* timer2 */
@@ -241,7 +226,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
			.idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
		},
	},
	.class		= &omap3xxx_timer_1ms_hwmod_class,
	.class		= &omap3xxx_timer_hwmod_class,
};

/* timer3 */
@@ -383,7 +368,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
		},
	},
	.dev_attr	= &capability_pwm_dev_attr,
	.class		= &omap3xxx_timer_1ms_hwmod_class,
	.class		= &omap3xxx_timer_hwmod_class,
};

/* timer11 */