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Commit 720419f0 authored by Brijesh Singh's avatar Brijesh Singh Committed by Herbert Xu
Browse files

crypto: ccp - Introduce the AMD Secure Processor device



The CCP device is part of the AMD Secure Processor. In order to expand
the usage of the AMD Secure Processor, create a framework that allows
functional components of the AMD Secure Processor to be initialized and
handled appropriately.

Signed-off-by: default avatarBrijesh Singh <brijesh.singh@amd.com>
Acked-by: default avatarGary R Hook <gary.hook@amd.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 970e8303
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+3 −3
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@@ -540,11 +540,11 @@ config CRYPTO_DEV_ATMEL_ECC
	  will be called atmel-ecc.

config CRYPTO_DEV_CCP
	bool "Support for AMD Cryptographic Coprocessor"
	bool "Support for AMD Secure Processor"
	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
	help
	  The AMD Cryptographic Coprocessor provides hardware offload support
	  for encryption, hashing and related operations.
	  The AMD Secure Processor provides support for the Cryptographic Coprocessor
	  (CCP) and the Platform Security Processor (PSP) devices.

if CRYPTO_DEV_CCP
	source "drivers/crypto/ccp/Kconfig"
+14 −7
Original line number Diff line number Diff line
config CRYPTO_DEV_CCP_DD
	tristate "Cryptographic Coprocessor device driver"
	depends on CRYPTO_DEV_CCP
	tristate "Secure Processor device driver"
	default m
	help
	  Provides AMD Secure Processor device driver.
	  If you choose 'M' here, this module will be called ccp.

config CRYPTO_DEV_SP_CCP
	bool "Cryptographic Coprocessor device"
	default y
	depends on CRYPTO_DEV_CCP_DD
	select HW_RANDOM
	select DMA_ENGINE
	select DMADEVICES
	select CRYPTO_SHA1
	select CRYPTO_SHA256
	help
	  Provides the interface to use the AMD Cryptographic Coprocessor
	  which can be used to offload encryption operations such as SHA,
	  AES and more. If you choose 'M' here, this module will be called
	  ccp.
	  Provides the support for AMD Cryptographic Coprocessor (CCP) device
	  which can be used to offload encryption operations such as SHA, AES
	  and more.

config CRYPTO_DEV_CCP_CRYPTO
	tristate "Encryption and hashing offload support"
	depends on CRYPTO_DEV_CCP_DD
	default m
	depends on CRYPTO_DEV_CCP_DD
	depends on CRYPTO_DEV_SP_CCP
	select CRYPTO_HASH
	select CRYPTO_BLKCIPHER
	select CRYPTO_AUTHENC
+2 −2
Original line number Diff line number Diff line
obj-$(CONFIG_CRYPTO_DEV_CCP_DD) += ccp.o
ccp-objs := ccp-dev.o \
ccp-objs  := sp-dev.o ccp-platform.o
ccp-$(CONFIG_CRYPTO_DEV_SP_CCP) += ccp-dev.o \
	    ccp-ops.o \
	    ccp-dev-v3.o \
	    ccp-dev-v5.o \
	    ccp-platform.o \
	    ccp-dmaengine.o \
	    ccp-debugfs.o
ccp-$(CONFIG_PCI) += ccp-pci.o
+1 −3
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@@ -359,8 +359,7 @@ static void ccp_irq_bh(unsigned long data)

static irqreturn_t ccp_irq_handler(int irq, void *data)
{
	struct device *dev = data;
	struct ccp_device *ccp = dev_get_drvdata(dev);
	struct ccp_device *ccp = (struct ccp_device *)data;

	ccp_disable_queue_interrupts(ccp);
	if (ccp->use_tasklet)
@@ -597,6 +596,5 @@ const struct ccp_vdata ccpv3 = {
	.version = CCP_VERSION(3, 0),
	.setup = NULL,
	.perform = &ccp3_actions,
	.bar = 2,
	.offset = 0x20000,
};
+1 −4
Original line number Diff line number Diff line
@@ -769,8 +769,7 @@ static void ccp5_irq_bh(unsigned long data)

static irqreturn_t ccp5_irq_handler(int irq, void *data)
{
	struct device *dev = data;
	struct ccp_device *ccp = dev_get_drvdata(dev);
	struct ccp_device *ccp = (struct ccp_device *)data;

	ccp5_disable_queue_interrupts(ccp);
	ccp->total_interrupts++;
@@ -1113,7 +1112,6 @@ const struct ccp_vdata ccpv5a = {
	.version = CCP_VERSION(5, 0),
	.setup = ccp5_config,
	.perform = &ccp5_actions,
	.bar = 2,
	.offset = 0x0,
};

@@ -1122,6 +1120,5 @@ const struct ccp_vdata ccpv5b = {
	.dma_chan_attr = DMA_PRIVATE,
	.setup = ccp5other_config,
	.perform = &ccp5_actions,
	.bar = 2,
	.offset = 0x0,
};
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