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Commit 71a59b12 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC fixes from Olof Johansson:
 "A week's worth of fixes for various ARM platforms.  Diff wise, the
  largest fix is for OMAP to deal with how GIC now registers interrupts
  (irq_domain_add_legacy() -> irq_domain_add_linear() changes).

  Besides this, a few more renesas platforms needed the GIC instatiation
  done for legacy boards.  There's also a fix that disables coherency of
  mvebu due to issues, and a few other smaller fixes"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm64: dts: add baud rate to Juno stdout-path
  ARM: dts: imx25: Fix PWM "per" clocks
  bus: mvebu-mbus: fix support of MBus window 13
  Merge tag 'mvebu-fixes-3.19-3' of git://git.infradead.org/linux-mvebu into fixes
  ARM: mvebu: completely disable hardware I/O coherency
  ARM: OMAP: Work around hardcoded interrupts
  ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds
  ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds
  arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
parents 80a75554 4b3415c9

arch/arm/boot/dts/dra7.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -1257,6 +1257,8 @@ 
				tx-fifo-resize;

				maximum-speed = "super-speed";

				dr_mode = "otg";

				snps,dis_u3_susphy_quirk;

				snps,dis_u2_susphy_quirk;

			};

		};
@@ -1278,6 +1280,8 @@ 
				tx-fifo-resize;

				maximum-speed = "high-speed";

				dr_mode = "otg";

				snps,dis_u3_susphy_quirk;

				snps,dis_u2_susphy_quirk;

			};

		};
@@ -1299,6 +1303,8 @@ 
				tx-fifo-resize;

				maximum-speed = "high-speed";

				dr_mode = "otg";

				snps,dis_u3_susphy_quirk;

				snps,dis_u2_susphy_quirk;

			};

		};

arch/arm/boot/dts/imx25.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -369,7 +369,7 @@ 
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";

				#pwm-cells = <2>;

				reg = <0x53fa0000 0x4000>;

				clocks = <&clks 106>, <&clks 36>;

				clocks = <&clks 106>, <&clks 52>;

				clock-names = "ipg", "per";

				interrupts = <36>;

			};
@@ -388,7 +388,7 @@ 
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";

				#pwm-cells = <2>;

				reg = <0x53fa8000 0x4000>;

				clocks = <&clks 107>, <&clks 36>;

				clocks = <&clks 107>, <&clks 52>;

				clock-names = "ipg", "per";

				interrupts = <41>;

			};
@@ -429,7 +429,7 @@ 
			pwm4: pwm@53fc8000 {

				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";

				reg = <0x53fc8000 0x4000>;

				clocks = <&clks 108>, <&clks 36>;

				clocks = <&clks 108>, <&clks 52>;

				clock-names = "ipg", "per";

				interrupts = <42>;

			};
@@ -476,7 +476,7 @@ 
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";

				#pwm-cells = <2>;

				reg = <0x53fe0000 0x4000>;

				clocks = <&clks 105>, <&clks 36>;

				clocks = <&clks 105>, <&clks 52>;

				clock-names = "ipg", "per";

				interrupts = <26>;

			};

arch/arm/mach-mvebu/coherency.c

+6 −1
Original line number Diff line number Diff line
@@ -246,9 +246,14 @@ static int coherency_type(void) 
	return type;

}



/*

 * As a precaution, we currently completely disable hardware I/O

 * coherency, until enough testing is done with automatic I/O

 * synchronization barriers to validate that it is a proper solution.

 */

int coherency_available(void)

{

	return coherency_type() != COHERENCY_FABRIC_TYPE_NONE;

	return false;

}



int __init coherency_init(void)

arch/arm/mach-omap2/common.h

+1 −0
Original line number Diff line number Diff line
@@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void); 
extern struct device *omap2_get_l3_device(void);

extern struct device *omap4_get_dsp_device(void);



unsigned int omap4_xlate_irq(unsigned int hwirq);

void omap_gic_of_init(void);



#ifdef CONFIG_CACHE_L2X0

arch/arm/mach-omap2/omap4-common.c

+32 −0
Original line number Diff line number Diff line
@@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void) 
}

omap_early_initcall(omap4_sar_ram_init);



static struct of_device_id gic_match[] = {

	{ .compatible = "arm,cortex-a9-gic", },

	{ .compatible = "arm,cortex-a15-gic", },

	{ },

};



static struct device_node *gic_node;



unsigned int omap4_xlate_irq(unsigned int hwirq)

{

	struct of_phandle_args irq_data;

	unsigned int irq;



	if (!gic_node)

		gic_node = of_find_matching_node(NULL, gic_match);



	if (WARN_ON(!gic_node))

		return hwirq;



	irq_data.np = gic_node;

	irq_data.args_count = 3;

	irq_data.args[0] = 0;

	irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;

	irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;



	irq = irq_create_of_mapping(&irq_data);

	if (WARN_ON(!irq))

		irq = hwirq;



	return irq;

}



void __init omap_gic_of_init(void)

{

	struct device_node *np;