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Commit 70f2f5c7 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
Browse files

drm/i915: Report the actual swizzling back to userspace 



Userspace cares about whether or not swizzling depends on the page
address for its direct access into bound objects. Extend the get_tiling
ioctl to report the physical swizzling value in addition to the logical
swizzling value so that userspace can accurately determine when it is
possible for manual detiling.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Akash Goel <akash.goel@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Testcase: igt/gem_tiled_wc
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c826c449

drivers/gpu/drm/i915/i915_gem_tiling.c

+1 −0
Original line number Diff line number Diff line
@@ -458,6 +458,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, 
	}



	/* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */

	args->phys_swizzle_mode = args->swizzle_mode;

	if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)

		args->swizzle_mode = I915_BIT_6_SWIZZLE_9;

	if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)

include/uapi/drm/i915_drm.h

+6 −0
Original line number Diff line number Diff line
@@ -876,6 +876,12 @@ struct drm_i915_gem_get_tiling { 
	 * mmap mapping.

	 */

	__u32 swizzle_mode;



	/**

	 * Returned address bit 6 swizzling required for CPU access through

	 * mmap mapping whilst bound.

	 */

	__u32 phys_swizzle_mode;

};



struct drm_i915_gem_get_aperture {