Loading drivers/hwtracing/coresight/coresight-tpdm.c +44 −0 Original line number Diff line number Diff line Loading @@ -230,6 +230,7 @@ struct cmb_dataset { uint32_t trig_patt_val[TPDM_CMB_PATT_CMP]; uint32_t trig_patt_mask[TPDM_CMB_PATT_CMP]; bool trig_ts; bool ts_all; uint32_t msr[TPDM_CMB_MAX_MSR]; uint8_t read_ctl_reg; struct mcmb_dataset *mcmb; Loading Loading @@ -627,6 +628,10 @@ static void __tpdm_enable_mcmb(struct tpdm_drvdata *drvdata) val = val | BIT(1); else val = val & ~BIT(1); if (drvdata->cmb->ts_all) val = val | BIT(2); else val = val & ~BIT(2); tpdm_writel(drvdata, val, TPDM_CMB_TIER); __tpdm_config_cmb_msr(drvdata); Loading Loading @@ -3564,6 +3569,44 @@ static ssize_t cmb_patt_ts_store(struct device *dev, } static DEVICE_ATTR_RW(cmb_patt_ts); static ssize_t cmb_ts_all_show(struct device *dev, struct device_attribute *attr, char *buf) { struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); if (!(test_bit(TPDM_DS_CMB, drvdata->datasets) || test_bit(TPDM_DS_MCMB, drvdata->datasets))) return -EPERM; return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned int)drvdata->cmb->ts_all); } static ssize_t cmb_ts_all_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) { struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); unsigned long val; if (kstrtoul(buf, 16, &val)) return -EINVAL; if (!(test_bit(TPDM_DS_CMB, drvdata->datasets) || test_bit(TPDM_DS_MCMB, drvdata->datasets))) return -EPERM; mutex_lock(&drvdata->lock); if (val) drvdata->cmb->ts_all = true; else drvdata->cmb->ts_all = false; mutex_unlock(&drvdata->lock); return size; } static DEVICE_ATTR_RW(cmb_ts_all); static ssize_t cmb_trig_patt_val_lsb_show(struct device *dev, struct device_attribute *attr, char *buf) Loading Loading @@ -4049,6 +4092,7 @@ static struct attribute *tpdm_cmb_attrs[] = { &dev_attr_cmb_patt_val.attr, &dev_attr_cmb_patt_mask.attr, &dev_attr_cmb_patt_ts.attr, &dev_attr_cmb_ts_all.attr, &dev_attr_cmb_trig_patt_val_lsb.attr, &dev_attr_cmb_trig_patt_mask_lsb.attr, &dev_attr_cmb_trig_patt_val_msb.attr, Loading Loading
drivers/hwtracing/coresight/coresight-tpdm.c +44 −0 Original line number Diff line number Diff line Loading @@ -230,6 +230,7 @@ struct cmb_dataset { uint32_t trig_patt_val[TPDM_CMB_PATT_CMP]; uint32_t trig_patt_mask[TPDM_CMB_PATT_CMP]; bool trig_ts; bool ts_all; uint32_t msr[TPDM_CMB_MAX_MSR]; uint8_t read_ctl_reg; struct mcmb_dataset *mcmb; Loading Loading @@ -627,6 +628,10 @@ static void __tpdm_enable_mcmb(struct tpdm_drvdata *drvdata) val = val | BIT(1); else val = val & ~BIT(1); if (drvdata->cmb->ts_all) val = val | BIT(2); else val = val & ~BIT(2); tpdm_writel(drvdata, val, TPDM_CMB_TIER); __tpdm_config_cmb_msr(drvdata); Loading Loading @@ -3564,6 +3569,44 @@ static ssize_t cmb_patt_ts_store(struct device *dev, } static DEVICE_ATTR_RW(cmb_patt_ts); static ssize_t cmb_ts_all_show(struct device *dev, struct device_attribute *attr, char *buf) { struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); if (!(test_bit(TPDM_DS_CMB, drvdata->datasets) || test_bit(TPDM_DS_MCMB, drvdata->datasets))) return -EPERM; return scnprintf(buf, PAGE_SIZE, "%u\n", (unsigned int)drvdata->cmb->ts_all); } static ssize_t cmb_ts_all_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) { struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); unsigned long val; if (kstrtoul(buf, 16, &val)) return -EINVAL; if (!(test_bit(TPDM_DS_CMB, drvdata->datasets) || test_bit(TPDM_DS_MCMB, drvdata->datasets))) return -EPERM; mutex_lock(&drvdata->lock); if (val) drvdata->cmb->ts_all = true; else drvdata->cmb->ts_all = false; mutex_unlock(&drvdata->lock); return size; } static DEVICE_ATTR_RW(cmb_ts_all); static ssize_t cmb_trig_patt_val_lsb_show(struct device *dev, struct device_attribute *attr, char *buf) Loading Loading @@ -4049,6 +4092,7 @@ static struct attribute *tpdm_cmb_attrs[] = { &dev_attr_cmb_patt_val.attr, &dev_attr_cmb_patt_mask.attr, &dev_attr_cmb_patt_ts.attr, &dev_attr_cmb_ts_all.attr, &dev_attr_cmb_trig_patt_val_lsb.attr, &dev_attr_cmb_trig_patt_mask_lsb.attr, &dev_attr_cmb_trig_patt_val_msb.attr, Loading