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Commit 70c62cf9 authored by Daniel Lezcano's avatar Daniel Lezcano Committed by Ingo Molnar
Browse files

clocksource/drivers/stm32: Factor out the timer width sorting code 



In order to clarify and encapsulate the code for upcoming changes, move the
timer width check into a function and add some documentation.

Tested-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1515418139-23276-14-git-send-email-daniel.lezcano@linaro.org


[ Spelling fixes. ]
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent f2ed8ef1

drivers/clocksource/timer-stm32.c

+23 −7
Original line number Diff line number Diff line
@@ -80,9 +80,27 @@ static irqreturn_t stm32_clock_event_handler(int irq, void *dev_id) 
	return IRQ_HANDLED;

}



/**

 * stm32_timer_width - Sort out the timer width (32/16)

 * @to: a pointer to a timer-of structure

 *

 * Write the 32-bit max value and read/return the result. If the timer

 * is 32 bits wide, the result will be UINT_MAX, otherwise it will

 * be truncated by the 16-bit register to USHRT_MAX.

 *

 * Returns UINT_MAX if the timer is 32 bits wide, USHRT_MAX if it is a

 * 16 bits wide.

 */

static u32 __init stm32_timer_width(struct timer_of *to)

{

	writel_relaxed(UINT_MAX, timer_of_base(to) + TIM_ARR);



	return readl_relaxed(timer_of_base(to) + TIM_ARR);

}



static void __init stm32_clockevent_init(struct timer_of *to)

{

	unsigned long max_delta;

	u32 width = 0;

	int prescaler;



	to->clkevt.name = to->np->full_name;
@@ -93,10 +111,8 @@ static void __init stm32_clockevent_init(struct timer_of *to) 
	to->clkevt.tick_resume = stm32_clock_event_shutdown;

	to->clkevt.set_next_event = stm32_clock_event_set_next_event;



	/* Detect whether the timer is 16 or 32 bits */

	writel_relaxed(~0U, timer_of_base(to) + TIM_ARR);

	max_delta = readl_relaxed(timer_of_base(to) + TIM_ARR);

	if (max_delta == ~0U) {

	width = stm32_timer_width(to);

	if (width == UINT_MAX) {

		prescaler = 1;

		to->clkevt.rating = 250;

	} else {
@@ -115,10 +131,10 @@ static void __init stm32_clockevent_init(struct timer_of *to) 
	to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);



	clockevents_config_and_register(&to->clkevt,

					timer_of_rate(to), 0x1, max_delta);

					timer_of_rate(to), 0x1, width);



	pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n",

		to->np, max_delta == UINT_MAX ? 32 : 16);

		to->np, width == UINT_MAX ? 32 : 16);

}



static int __init stm32_timer_init(struct device_node *node)