Commit 70b4edd7 authored Jul 16, 2019 by Vladimir Kondratiev Committed by Greg Kroah-Hartman Aug 29, 2019

mips: fix cacheinfo



[ Upstream commit b8bea8a5e5d942e62203416ab41edecaed4fda02 ]

Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information
from DT, ignoring data filled by architecture routine. This leads to error
reported

 cacheinfo: Unable to detect cache hierarchy for CPU 0

Way to fix this provided in
commit fac51482 ("drivers: base: cacheinfo: fix x86 with
 CONFIG_OF enabled")

Utilize same mechanism to report that cacheinfo set by architecture
specific function

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent 326175aa

arch/mips/kernel/cacheinfo.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -80,6 +80,8 @@ static int __populate_cache_leaves(unsigned int cpu)
		if (c->tcache.waysize)
		populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);

		this_cpu_ci->cpu_map_populated = true;

		return 0;
		}