Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 70535350 authored by Rick Farrington's avatar Rick Farrington Committed by David S. Miller
Browse files

liquidio: with embedded f/w, don't reload f/w, issue pf flr at exit



1. Add support for PF FLR when exiting
   (enables CORE_DRV_ACTIVE upon next driver init)
2. Skip some initialization (don't try to load f/w, activate consoles).

Signed-off-by: default avatarRick Farrington <ricardo.farrington@cavium.com>
Signed-off-by: default avatarFelix Manlunas <felix.manlunas@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 755f17a1
Loading
Loading
Loading
Loading
+46 −24
Original line number Diff line number Diff line
@@ -1121,6 +1121,33 @@ static bool fw_type_is_none(void)
		       sizeof(LIO_FW_NAME_TYPE_NONE)) == 0;
}

/**
 * \brief PCI FLR for each Octeon device.
 * @param oct octeon device
 */
static void octeon_pci_flr(struct octeon_device *oct)
{
	int rc;

	pci_save_state(oct->pci_dev);

	pci_cfg_access_lock(oct->pci_dev);

	/* Quiesce the device completely */
	pci_write_config_word(oct->pci_dev, PCI_COMMAND,
			      PCI_COMMAND_INTX_DISABLE);

	rc = __pci_reset_function_locked(oct->pci_dev);

	if (rc != 0)
		dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n",
			rc, oct->pf_num);

	pci_cfg_access_unlock(oct->pci_dev);

	pci_restore_state(oct->pci_dev);
}

/**
 *\brief Destroy resources associated with octeon device
 * @param pdev PCI device structure
@@ -1269,14 +1296,16 @@ static void octeon_destroy_resources(struct octeon_device *oct)
	case OCT_DEV_PCI_MAP_DONE:
		refcount = octeon_deregister_device(oct);

		if (!fw_type_is_none()) {
		/* Soft reset the octeon device before exiting.
			 * Implementation note: here, we reset the device
			 * if it is a CN6XXX OR the last CN23XX device.
		 * However, if fw was loaded from card (i.e. autoboot),
		 * perform an FLR instead.
		 * Implementation note: only soft-reset the device
		 * if it is a CN6XXX OR the LAST CN23XX device.
		 */
			if (OCTEON_CN6XXX(oct) || !refcount)
		if (fw_type_is_none())
			octeon_pci_flr(oct);
		else if (OCTEON_CN6XXX(oct) || !refcount)
			oct->fn_list.soft_reset(oct);
		}

		octeon_unmap_pci_barx(oct, 0);
		octeon_unmap_pci_barx(oct, 1);
@@ -1912,11 +1941,6 @@ static int load_firmware(struct octeon_device *oct)
	char fw_name[LIO_MAX_FW_FILENAME_LEN];
	char *tmp_fw_type;

	if (fw_type_is_none()) {
		dev_info(&oct->pci_dev->dev, "Skipping firmware load\n");
		return ret;
	}

	if (fw_type[0] == '\0')
		tmp_fw_type = LIO_FW_NAME_TYPE_NIC;
	else
@@ -3900,9 +3924,8 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
	octeon_dev->app_mode = CVM_DRV_INVALID_APP;

	if (OCTEON_CN23XX_PF(octeon_dev)) {
		if (!cn23xx_fw_loaded(octeon_dev)) {
		if (!cn23xx_fw_loaded(octeon_dev) && !fw_type_is_none()) {
			fw_loaded = 0;
			if (!fw_type_is_none()) {
			/* Do a soft reset of the Octeon device. */
			if (octeon_dev->fn_list.soft_reset(octeon_dev))
				return 1;
@@ -3911,7 +3934,6 @@ static int octeon_device_init(struct octeon_device *octeon_dev)
				fw_loaded = 0;
			else
				fw_loaded = 1;
			}
		} else {
			fw_loaded = 1;
		}