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Commit 70432821 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Update supported dsi clock list on lito"

parents caaea84a 77c3b0e3

qcom/lito-sde-display.dtsi

+1 −19
Original line number Diff line number Diff line
@@ -205,7 +205,7 @@ 
	qcom,mdss-dsi-panel-status-read-length = <1>;



	qcom,dsi-dyn-clk-enable;

	qcom,dsi-dyn-clk-list = <606979440 604450359 601921278>;

	qcom,dsi-dyn-clk-list = <527839720 525640384 523441048>;



	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",

				"src_byte_clk0", "src_pixel_clk0",
@@ -494,15 +494,6 @@ 


&dsi_nt35695b_truly_fhd_cmd {

	qcom,ulps-enabled;



	qcom,dsi-ctrl-num = <0>;

	qcom,dsi-phy-num = <0>;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";



	qcom,dsi-sec-ctrl-num = <1>;

	qcom,dsi-sec-phy-num = <1>;

	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";



	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -524,15 +515,6 @@ 


&dsi_nt35695b_truly_fhd_video {

	qcom,esd-check-enabled;



	qcom,dsi-ctrl-num = <0>;

	qcom,dsi-phy-num = <0>;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";



	qcom,dsi-sec-ctrl-num = <1>;

	qcom,dsi-sec-phy-num = <1>;

	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";



	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];

	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";