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Commit 702fbb89 authored Apr 13, 2014 by Fabio Estevam Committed by Shawn Guo May 16, 2014

ARM: dts: imx27-pdk: Pass the FEC pin configuration



Provide an entry for the FEC pin muxing.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

parent e5877326

arch/arm/boot/dts/imx27-pdk.dts

+26 −0

Original line number	Diff line number	Diff line
		@@ -23,6 +23,9 @@


		&fec {
		phy-mode = "mii";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_fec>;
		status = "okay";
		};

		@@ -35,6 +38,29 @@

		&iomuxc {
		imx27-pdk {
		pinctrl_fec: fecgrp {
		fsl,pins = <
		MX27_PAD_SD3_CMD__FEC_TXD0 0x0
		MX27_PAD_SD3_CLK__FEC_TXD1 0x0
		MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
		MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
		MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
		MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
		MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
		MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
		MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
		MX27_PAD_ATA_DATA7__FEC_MDC 0x0
		MX27_PAD_ATA_DATA8__FEC_CRS 0x0
		MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
		MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
		MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
		MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
		MX27_PAD_ATA_DATA13__FEC_COL 0x0
		MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
		MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
		>;
		};

		pinctrl_uart1: uart1grp {
		fsl,pins = <
		MX27_PAD_UART1_TXD__UART1_TXD 0x0