Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6ff8ab0d authored by Jesse Barnes's avatar Jesse Barnes Committed by Daniel Vetter
Browse files

drm/i915: make CSR firmware messages less verbose



Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Acked-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b970b486
Loading
Loading
Loading
Loading
+6 −6
Original line number Original line Diff line number Diff line
@@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)


void assert_csr_loaded(struct drm_i915_private *dev_priv)
void assert_csr_loaded(struct drm_i915_private *dev_priv)
{
{
	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
		  "CSR is not loaded.\n");
		  "CSR is not loaded.\n");
	WARN(!I915_READ(CSR_PROGRAM_BASE),
	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
		  "CSR program storage start is NULL\n");
		  "CSR program storage start is NULL\n");
	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
}
}
+18 −18
Original line number Original line Diff line number Diff line
@@ -463,13 +463,13 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
					SKL_DISP_PW_2);
					SKL_DISP_PW_2);


	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
	WARN(pg2_enabled, "PG2 not disabled to enable DC5.\n");
	WARN_ONCE(pg2_enabled, "PG2 not disabled to enable DC5.\n");


	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
		  "DC5 already programmed to be enabled.\n");
		  "DC5 already programmed to be enabled.\n");
	WARN(dev_priv->pm.suspended,
	WARN_ONCE(dev_priv->pm.suspended,
		  "DC5 cannot be enabled, if platform is runtime-suspended.\n");
		  "DC5 cannot be enabled, if platform is runtime-suspended.\n");


	assert_csr_loaded(dev_priv);
	assert_csr_loaded(dev_priv);
@@ -486,8 +486,8 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)
	if (dev_priv->power_domains.initializing)
	if (dev_priv->power_domains.initializing)
		return;
		return;


	WARN(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
	WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
	WARN(dev_priv->pm.suspended,
	WARN_ONCE(dev_priv->pm.suspended,
		"Disabling of DC5 while platform is runtime-suspended should never happen.\n");
		"Disabling of DC5 while platform is runtime-suspended should never happen.\n");
}
}


@@ -526,11 +526,11 @@ static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
{
{
	struct drm_device *dev = dev_priv->dev;
	struct drm_device *dev = dev_priv->dev;


	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
	WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
	WARN_ONCE(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
		  "Backlight is not disabled.\n");
		  "Backlight is not disabled.\n");
	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
		  "DC6 already programmed to be enabled.\n");
		  "DC6 already programmed to be enabled.\n");


	assert_csr_loaded(dev_priv);
	assert_csr_loaded(dev_priv);
@@ -546,7 +546,7 @@ static void assert_can_disable_dc6(struct drm_i915_private *dev_priv)
		return;
		return;


	assert_csr_loaded(dev_priv);
	assert_csr_loaded(dev_priv);
	WARN(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
	WARN_ONCE(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
		  "DC6 already programmed to be disabled.\n");
		  "DC6 already programmed to be disabled.\n");
}
}


@@ -670,7 +670,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
				wait_for((state = intel_csr_load_status_get(dev_priv)) !=
				wait_for((state = intel_csr_load_status_get(dev_priv)) !=
						FW_UNINITIALIZED, 1000);
						FW_UNINITIALIZED, 1000);
				if (state != FW_LOADED)
				if (state != FW_LOADED)
					DRM_ERROR("CSR firmware not ready (%d)\n",
					DRM_DEBUG("CSR firmware not ready (%d)\n",
							state);
							state);
				else
				else
					if (SKL_ENABLE_DC6(dev))
					if (SKL_ENABLE_DC6(dev))