Loading drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c +80 −48 Original line number Diff line number Diff line Loading @@ -1545,6 +1545,71 @@ static int cam_ife_csid_config_tpg(struct cam_ife_csid_hw *csid_hw, return 0; } static int cam_ife_csid_csi2_irq_ctrl( struct cam_ife_csid_hw *csid_hw, bool irq_enable) { uint32_t val = 0; struct cam_hw_soc_info *soc_info; const struct cam_ife_csid_reg_offset *csid_reg; csid_reg = csid_hw->csid_info->csid_reg; soc_info = &csid_hw->hw_info->soc_info; if (irq_enable) { /*Enable the CSI2 rx interrupts */ val = CSID_CSI2_RX_INFO_RST_DONE | CSID_CSI2_RX_ERROR_TG_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE0_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION | CSID_CSI2_RX_ERROR_CRC | CSID_CSI2_RX_ERROR_ECC | CSID_CSI2_RX_ERROR_MMAPPED_VC_DT | CSID_CSI2_RX_ERROR_STREAM_UNDERFLOW | CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME | CSID_CSI2_RX_ERROR_CPHY_PH_CRC; if (csid_hw->epd_supported == 1) CAM_INFO(CAM_ISP, "Disable CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION for EPD"); else val = val | CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION; /* Enable the interrupt based on csid debug info set */ if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_SOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_EOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_SHORT_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_LONG_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_CPHY_PKT_HDR_CAPTURED; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); } else { /* Disable the CSI2 rx inerrupts */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); } return 0; } static int cam_ife_csid_enable_csi2( struct cam_ife_csid_hw *csid_hw, struct cam_isp_resource_node *res) Loading Loading @@ -1605,51 +1670,7 @@ static int cam_ife_csid_enable_csi2( } } /*Enable the CSI2 rx interrupts */ val = CSID_CSI2_RX_INFO_RST_DONE | CSID_CSI2_RX_ERROR_TG_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE0_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION | CSID_CSI2_RX_ERROR_CRC | CSID_CSI2_RX_ERROR_ECC | CSID_CSI2_RX_ERROR_MMAPPED_VC_DT | CSID_CSI2_RX_ERROR_STREAM_UNDERFLOW | CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME | CSID_CSI2_RX_ERROR_CPHY_PH_CRC; if (csid_hw->epd_supported == 1) CAM_INFO(CAM_ISP, "Disable CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION for EPD"); else val = val | CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION; /* Enable the interrupt based on csid debug info set */ if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_SOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_EOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_SHORT_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_LONG_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_CPHY_PKT_HDR_CAPTURED; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); cam_ife_csid_csi2_irq_ctrl(csid_hw, true); return 0; } Loading Loading @@ -1686,9 +1707,7 @@ static int cam_ife_csid_disable_csi2( if (csid_hw->csi2_cfg_cnt) return 0; /* Disable the CSI2 rx inerrupts */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); cam_ife_csid_csi2_irq_ctrl(csid_hw, false); /* Reset the Rx CFG registers */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + Loading Loading @@ -3688,6 +3707,7 @@ int cam_ife_csid_start(void *hw_priv, void *start_args, struct cam_hw_info *csid_hw_info; struct cam_isp_resource_node *res; const struct cam_ife_csid_reg_offset *csid_reg; unsigned long flags; if (!hw_priv || !start_args || (arg_size != sizeof(struct cam_isp_resource_node))) { Loading Loading @@ -3715,6 +3735,12 @@ int cam_ife_csid_start(void *hw_priv, void *start_args, csid_hw->sof_irq_triggered = false; csid_hw->irq_debug_cnt = 0; spin_lock_irqsave(&csid_hw->lock_state, flags); if (!csid_hw->device_enabled) cam_ife_csid_csi2_irq_ctrl(csid_hw, true); csid_hw->device_enabled = 1; spin_unlock_irqrestore(&csid_hw->lock_state, flags); CAM_DBG(CAM_ISP, "CSID:%d res_type :%d res_id:%d", csid_hw->hw_intf->hw_idx, res->res_type, res->res_id); Loading Loading @@ -3798,6 +3824,7 @@ int cam_ife_csid_stop(void *hw_priv, struct cam_csid_hw_stop_args *csid_stop; uint32_t i; uint32_t res_mask = 0; unsigned long flags; if (!hw_priv || !stop_args || (arg_size != sizeof(struct cam_csid_hw_stop_args))) { Loading @@ -3817,6 +3844,11 @@ int cam_ife_csid_stop(void *hw_priv, csid_hw->hw_intf->hw_idx, csid_stop->num_res); spin_lock_irqsave(&csid_hw->lock_state, flags); csid_hw->device_enabled = 0; cam_ife_csid_csi2_irq_ctrl(csid_hw, false); spin_unlock_irqrestore(&csid_hw->lock_state, flags); /* Stop the resource first */ for (i = 0; i < csid_stop->num_res; i++) { res = csid_stop->node_res[i]; Loading drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite17x.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_IFE_CSID_LITE17X_H_ Loading Loading @@ -298,6 +298,12 @@ static const struct cam_ife_csid_common_reg_offset .ipp_irq_mask_all = 0x7FFF, .rdi_irq_mask_all = 0x7FFF, .ppp_irq_mask_all = 0xFFFF, .measure_en_hbi_vbi_cnt_mask = 0xC, .format_measure_en_val = 1, .format_measure_height_mask_val = 0xFFFF, .format_measure_height_shift_val = 0x10, .format_measure_width_mask_val = 0xFFFF, .format_measure_width_shift_val = 0x0, }; static const struct cam_ife_csid_reg_offset cam_ife_csid_lite_17x_reg_offset = { Loading drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite480.h +5 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019, The Linux Foundation. All rights reserved. * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_IFE_CSID_LITE_480_H_ Loading Loading @@ -321,6 +321,10 @@ static struct cam_ife_csid_common_reg_offset .ppp_irq_mask_all = 0xFFFF, .measure_en_hbi_vbi_cnt_mask = 0xC, .format_measure_en_val = 1, .format_measure_height_mask_val = 0xFFFF, .format_measure_height_shift_val = 0x10, .format_measure_width_mask_val = 0xFFFF, .format_measure_width_shift_val = 0x0, }; static struct cam_ife_csid_reg_offset cam_ife_csid_lite_480_reg_offset = { Loading drivers/cam_req_mgr/cam_req_mgr_dev.c +0 −1 Original line number Diff line number Diff line Loading @@ -651,7 +651,6 @@ void cam_subdev_notify_message(u32 subdev_type, struct cam_subdev *csd = NULL; list_for_each_entry(sd, &g_dev.v4l2_dev->subdevs, list) { sd->entity.name = video_device_node_name(sd->devnode); if (sd->entity.function == subdev_type) { csd = container_of(sd, struct cam_subdev, sd); if (csd->msg_cb != NULL) Loading drivers/cam_sensor_module/cam_cci/cam_cci_dev.c +1 −2 Original line number Diff line number Diff line Loading @@ -429,8 +429,7 @@ static int cam_cci_platform_probe(struct platform_device *pdev) sizeof(new_cci_dev->device_name)); new_cci_dev->v4l2_dev_str.name = new_cci_dev->device_name; new_cci_dev->v4l2_dev_str.sd_flags = (V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS); new_cci_dev->v4l2_dev_str.sd_flags = V4L2_SUBDEV_FL_HAS_EVENTS; new_cci_dev->v4l2_dev_str.ent_function = CAM_CCI_DEVICE_TYPE; new_cci_dev->v4l2_dev_str.token = Loading Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c +80 −48 Original line number Diff line number Diff line Loading @@ -1545,6 +1545,71 @@ static int cam_ife_csid_config_tpg(struct cam_ife_csid_hw *csid_hw, return 0; } static int cam_ife_csid_csi2_irq_ctrl( struct cam_ife_csid_hw *csid_hw, bool irq_enable) { uint32_t val = 0; struct cam_hw_soc_info *soc_info; const struct cam_ife_csid_reg_offset *csid_reg; csid_reg = csid_hw->csid_info->csid_reg; soc_info = &csid_hw->hw_info->soc_info; if (irq_enable) { /*Enable the CSI2 rx interrupts */ val = CSID_CSI2_RX_INFO_RST_DONE | CSID_CSI2_RX_ERROR_TG_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE0_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION | CSID_CSI2_RX_ERROR_CRC | CSID_CSI2_RX_ERROR_ECC | CSID_CSI2_RX_ERROR_MMAPPED_VC_DT | CSID_CSI2_RX_ERROR_STREAM_UNDERFLOW | CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME | CSID_CSI2_RX_ERROR_CPHY_PH_CRC; if (csid_hw->epd_supported == 1) CAM_INFO(CAM_ISP, "Disable CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION for EPD"); else val = val | CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION; /* Enable the interrupt based on csid debug info set */ if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_SOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_EOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_SHORT_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_LONG_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_CPHY_PKT_HDR_CAPTURED; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); } else { /* Disable the CSI2 rx inerrupts */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); } return 0; } static int cam_ife_csid_enable_csi2( struct cam_ife_csid_hw *csid_hw, struct cam_isp_resource_node *res) Loading Loading @@ -1605,51 +1670,7 @@ static int cam_ife_csid_enable_csi2( } } /*Enable the CSI2 rx interrupts */ val = CSID_CSI2_RX_INFO_RST_DONE | CSID_CSI2_RX_ERROR_TG_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE0_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE1_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE2_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_LANE3_FIFO_OVERFLOW | CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION | CSID_CSI2_RX_ERROR_CRC | CSID_CSI2_RX_ERROR_ECC | CSID_CSI2_RX_ERROR_MMAPPED_VC_DT | CSID_CSI2_RX_ERROR_STREAM_UNDERFLOW | CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME | CSID_CSI2_RX_ERROR_CPHY_PH_CRC; if (csid_hw->epd_supported == 1) CAM_INFO(CAM_ISP, "Disable CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION for EPD"); else val = val | CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION; /* Enable the interrupt based on csid debug info set */ if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_SOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_SOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_EOT_IRQ) val |= CSID_CSI2_RX_INFO_PHY_DL0_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL1_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL2_EOT_CAPTURED | CSID_CSI2_RX_INFO_PHY_DL3_EOT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_SHORT_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_LONG_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_LONG_PKT_CAPTURED; if (csid_hw->csid_debug & CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE) val |= CSID_CSI2_RX_INFO_CPHY_PKT_HDR_CAPTURED; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); cam_ife_csid_csi2_irq_ctrl(csid_hw, true); return 0; } Loading Loading @@ -1686,9 +1707,7 @@ static int cam_ife_csid_disable_csi2( if (csid_hw->csi2_cfg_cnt) return 0; /* Disable the CSI2 rx inerrupts */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr); cam_ife_csid_csi2_irq_ctrl(csid_hw, false); /* Reset the Rx CFG registers */ cam_io_w_mb(0, soc_info->reg_map[0].mem_base + Loading Loading @@ -3688,6 +3707,7 @@ int cam_ife_csid_start(void *hw_priv, void *start_args, struct cam_hw_info *csid_hw_info; struct cam_isp_resource_node *res; const struct cam_ife_csid_reg_offset *csid_reg; unsigned long flags; if (!hw_priv || !start_args || (arg_size != sizeof(struct cam_isp_resource_node))) { Loading Loading @@ -3715,6 +3735,12 @@ int cam_ife_csid_start(void *hw_priv, void *start_args, csid_hw->sof_irq_triggered = false; csid_hw->irq_debug_cnt = 0; spin_lock_irqsave(&csid_hw->lock_state, flags); if (!csid_hw->device_enabled) cam_ife_csid_csi2_irq_ctrl(csid_hw, true); csid_hw->device_enabled = 1; spin_unlock_irqrestore(&csid_hw->lock_state, flags); CAM_DBG(CAM_ISP, "CSID:%d res_type :%d res_id:%d", csid_hw->hw_intf->hw_idx, res->res_type, res->res_id); Loading Loading @@ -3798,6 +3824,7 @@ int cam_ife_csid_stop(void *hw_priv, struct cam_csid_hw_stop_args *csid_stop; uint32_t i; uint32_t res_mask = 0; unsigned long flags; if (!hw_priv || !stop_args || (arg_size != sizeof(struct cam_csid_hw_stop_args))) { Loading @@ -3817,6 +3844,11 @@ int cam_ife_csid_stop(void *hw_priv, csid_hw->hw_intf->hw_idx, csid_stop->num_res); spin_lock_irqsave(&csid_hw->lock_state, flags); csid_hw->device_enabled = 0; cam_ife_csid_csi2_irq_ctrl(csid_hw, false); spin_unlock_irqrestore(&csid_hw->lock_state, flags); /* Stop the resource first */ for (i = 0; i < csid_stop->num_res; i++) { res = csid_stop->node_res[i]; Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite17x.h +7 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_IFE_CSID_LITE17X_H_ Loading Loading @@ -298,6 +298,12 @@ static const struct cam_ife_csid_common_reg_offset .ipp_irq_mask_all = 0x7FFF, .rdi_irq_mask_all = 0x7FFF, .ppp_irq_mask_all = 0xFFFF, .measure_en_hbi_vbi_cnt_mask = 0xC, .format_measure_en_val = 1, .format_measure_height_mask_val = 0xFFFF, .format_measure_height_shift_val = 0x10, .format_measure_width_mask_val = 0xFFFF, .format_measure_width_shift_val = 0x0, }; static const struct cam_ife_csid_reg_offset cam_ife_csid_lite_17x_reg_offset = { Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite480.h +5 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019, The Linux Foundation. All rights reserved. * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_IFE_CSID_LITE_480_H_ Loading Loading @@ -321,6 +321,10 @@ static struct cam_ife_csid_common_reg_offset .ppp_irq_mask_all = 0xFFFF, .measure_en_hbi_vbi_cnt_mask = 0xC, .format_measure_en_val = 1, .format_measure_height_mask_val = 0xFFFF, .format_measure_height_shift_val = 0x10, .format_measure_width_mask_val = 0xFFFF, .format_measure_width_shift_val = 0x0, }; static struct cam_ife_csid_reg_offset cam_ife_csid_lite_480_reg_offset = { Loading
drivers/cam_req_mgr/cam_req_mgr_dev.c +0 −1 Original line number Diff line number Diff line Loading @@ -651,7 +651,6 @@ void cam_subdev_notify_message(u32 subdev_type, struct cam_subdev *csd = NULL; list_for_each_entry(sd, &g_dev.v4l2_dev->subdevs, list) { sd->entity.name = video_device_node_name(sd->devnode); if (sd->entity.function == subdev_type) { csd = container_of(sd, struct cam_subdev, sd); if (csd->msg_cb != NULL) Loading
drivers/cam_sensor_module/cam_cci/cam_cci_dev.c +1 −2 Original line number Diff line number Diff line Loading @@ -429,8 +429,7 @@ static int cam_cci_platform_probe(struct platform_device *pdev) sizeof(new_cci_dev->device_name)); new_cci_dev->v4l2_dev_str.name = new_cci_dev->device_name; new_cci_dev->v4l2_dev_str.sd_flags = (V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS); new_cci_dev->v4l2_dev_str.sd_flags = V4L2_SUBDEV_FL_HAS_EVENTS; new_cci_dev->v4l2_dev_str.ent_function = CAM_CCI_DEVICE_TYPE; new_cci_dev->v4l2_dev_str.token = Loading